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(-)gcc/config/rs6000/rs6000.md (-20 / +28 lines)
Lines 8344-8378 (define_expand "extenddftf2" Link Here
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{
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{
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  if (TARGET_E500_DOUBLE)
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  if (TARGET_E500_DOUBLE)
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    emit_insn (gen_spe_extenddftf2 (operands[0], operands[1]));
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    emit_insn (gen_spe_extenddftf2 (operands[0], operands[1]));
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  else if (TARGET_VSX)
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    emit_insn (gen_extenddftf2_vsx (operands[0], operands[1],
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               CONST0_RTX (DFmode)));
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  else
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  else
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    emit_insn (gen_extenddftf2_fprs (operands[0], operands[1]));
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    {
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      rtx tmp = gen_reg_rtx (DFmode);
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      rs6000_emit_move (tmp, CONST0_RTX (DFmode), DFmode);
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      emit_insn (gen_extenddftf2_nonvsx (operands[0], operands[1], tmp));
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    }
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  DONE;
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  DONE;
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})
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})
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(define_expand "extenddftf2_fprs"
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(define_insn_and_split "extenddftf2_nonvsx"
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  [(parallel [(set (match_operand:TF 0 "nonimmediate_operand" "")
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  [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,d,&d,r")
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		   (float_extend:TF (match_operand:DF 1 "input_operand" "")))
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	(float_extend:TF (match_operand:DF 1 "input_operand" "d,r,m,d,r")))
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	      (use (match_dup 2))])]
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   (use (match_operand:DF 2 "gpc_reg_operand" "d,r,d,d,r"))]
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  "!TARGET_IEEEQUAD
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  "!TARGET_IEEEQUAD && !TARGET_VSX
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   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
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   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
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   && TARGET_LONG_DOUBLE_128"
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   && TARGET_LONG_DOUBLE_128"
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  "#"
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  "&& reload_completed"
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  [(pc)]
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{
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{
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  /* VSX can create 0.0 directly, otherwise let rs6000_emit_move create
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  const int lo_word = LONG_DOUBLE_LARGE_FIRST ? GET_MODE_SIZE (DFmode) : 0;
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     the proper constant.  */
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  const int hi_word = LONG_DOUBLE_LARGE_FIRST ? 0 : GET_MODE_SIZE (DFmode);
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  if (TARGET_VSX)
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  emit_move_insn (simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word),
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    operands[2] = CONST0_RTX (DFmode);
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		  operands[1]);
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  else
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  emit_move_insn (simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word),
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    {
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		  operands[2]);
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      operands[2] = gen_reg_rtx (DFmode);
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  DONE;
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      rs6000_emit_move (operands[2], CONST0_RTX (DFmode), DFmode);
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    }
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})
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})
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(define_insn_and_split "*extenddftf2_internal"
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(define_insn_and_split "extenddftf2_vsx"
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  [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,ws,d,&d,r")
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  [(set (match_operand:TF 0 "nonimmediate_operand" "=m,Y,d,d,r,r")
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       (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,md,md,md,rm")))
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       (float_extend:TF (match_operand:DF 1 "input_operand" "d,r,m,ws,Y,r")))
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   (use (match_operand:DF 2 "zero_reg_mem_operand" "d,r,j,m,d,n"))]
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   (use (match_operand:DF 2 "zero_fp_constant" "j,j,j,j,j,j"))]
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  "!TARGET_IEEEQUAD
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  "!TARGET_IEEEQUAD && TARGET_VSX
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   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
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   && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT 
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   && TARGET_LONG_DOUBLE_128"
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   && TARGET_LONG_DOUBLE_128"
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  "#"
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  "#"
(-)gcc/testsuite/gcc.target/powerpc/pr65576.c (+35 lines)
Line 0 Link Here
1
/* { dg-do compile { target { powerpc*-*-* } } } */
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/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power5" } } */
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/* { dg-options "-O2 -mcpu=power5" } */
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/* This is gcc.c-torture/compile/pr33855.c with -mcpu=power5.  */
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/* Testcase by Martin Michlmayr <tbm@cyrius.com> */
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/* Used to segfault due to cselim not marking the complex temp var
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   as GIMPLE reg.  */
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extern long double cabsl(long double _Complex z);
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typedef struct {
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  int nsant, nvqd;
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  _Complex long double *vqd;
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} vsorc_t;
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vsorc_t vsorc;
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void foo(int next_job, int ain_num, int iped, long t) {
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  long double zpnorm;
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  while (!next_job)
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    if (ain_num)
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    {
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      if (iped == 1)
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        zpnorm = 0.0;
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      int indx = vsorc.nvqd-1;
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      vsorc.vqd[indx] = t*1.0fj;
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      if (cabsl(vsorc.vqd[indx]) < 1.e-20)
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        vsorc.vqd[indx] = 0.0fj;
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      zpnorm = t;
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      if (zpnorm > 0.0)
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        iped = vsorc.nsant;
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    }
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}

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