Attachment 26679 Details for Bug 52278 – add.c.197r.ira

add.c.197r.ira

add.c.197r.ira (text/plain), 9.79 KB, created by Georg-Johann Lay on 2012-02-16 14:04:02 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Georg-Johann Lay

Created: 2012-02-16 14:04:02 UTC

Size: 9.79 KB

patch

obsolete

>
>;; Function add (add, funcdef_no=0, decl_uid=1318, cgraph_uid=0)
>
>starting the processing of deferred insns
>ending the processing of deferred insns
>df_analyze called
>Building IRA IR
>starting the processing of deferred insns
>ending the processing of deferred insns
>df_analyze called
>
>Pass 0 for finding pseudo/allocno costs
>
>    a0 (r45,l0) best GENERAL_REGS, allocno GENERAL_REGS
>
>  a0(r45,l0) costs: POINTER_X_REGS:2000 POINTER_Y_REGS:2000 POINTER_Z_REGS:2000 BASE_POINTER_REGS:2000 POINTER_REGS:2000 ADDW_REGS:2000 SIMPLE_LD_REGS:2000 LD_REGS:2000 NO_LD_REGS:2000 GENERAL_REGS:4000 ALL_REGS:4000 MEM:10000
>
>
>Pass 1 for finding pseudo/allocno costs
>
>    r45: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
>
>  a0(r45,l0) costs: GENERAL_REGS:4000 MEM:10000
>
>   Insn 14(l0): point = 0
>   Insn 20(l0): point = 2
>   Insn 19(l0): point = 4
>   Insn 6(l0): point = 6
> a0(r45 [0]): [5..6]
> a0(r45 [1]): [3..6]
>Compressing live ranges: from 9 to 2 - 22%
>Ranges after the compression:
> a0(r45 [0]): [0..1]
> a0(r45 [1]): [0..1]
>+++Allocating 8 bytes for conflict table (uncompressed size 8)
>;; a0(r45,l0) conflicts:
>;;   subobject 0:
>;;     total conflict hard regs:
>;;     conflict hard regs:
>
>
>;;   subobject 1:
>;;     total conflict hard regs: 24
>;;     conflict hard regs: 24
>
>  regions=1, blocks=3, points=2
>    allocnos=1 (big 1), copies=0, conflicts=0, ranges=2
>
>**** Allocnos coloring:
>
>
>  Loop 0 (parent -1, header bb2, depth 0)
>    bbs: 2
>    all: 0r45
>    modified regnos: 45
>    border:
>    Pressure: GENERAL_REGS=2
>    Hard reg set forest:
>      0:( 2-31)@0
>        1:( 2-23 25-31)@20000
>      Allocno a0r45 of GENERAL_REGS(30) has 29 avail. regs  2-23 25-31, node:  2-23 25-31 obj 0 (confl regs =  0 1 32-34),  obj 1 (confl regs =  0 1 24 32-34)
>      Pushing a0(r45,l0)(cost 0)
>      Popping a0(r45,l0)  -- assign reg 18
>Disposition:
>    0:r45  l0    18
>New iteration of spill/restore move
>+++Costs: overall 4000, reg 4000, mem 0, ld 0, st 0, move 0
>+++       move loops 0, new jumps 0
>
>
>add
>
>Dataflow summary:
>;;  invalidated by call 	 0 [r0] 1 [r1] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 31 [r31] 33 [__SP_H__] 35 [argH]
>;;  hardware regs used 	 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  regular block artificial uses 	 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  eh block artificial uses 	 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  entry block defs 	 8 [r8] 9 [r9] 10 [r10] 11 [r11] 12 [r12] 13 [r13] 14 [r14] 15 [r15] 16 [r16] 17 [r17] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  exit block uses 	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__]
>;;  regs ever live 	 24[r24] 25[r25]
>;;  ref usage 	r8={1d} r9={1d} r10={1d} r11={1d} r12={1d} r13={1d} r14={1d} r15={1d} r16={1d} r17={1d} r18={1d} r19={1d} r20={1d} r21={1d} r22={1d} r23={1d} r24={2d,3u} r25={2d,3u} r28={1d,2u} r32={1d,2u} r34={1d,1u} r45={1d,2u} 
>;;    total ref usage 37{24d,13u,0e} in 4{4 regular + 0 call} insns.
>(note 1 0 4 NOTE_INSN_DELETED)
>
>
>;; Basic block 2 , prev 0, next 1, loop_depth 0, count 0, freq 10000, maybe hot, flags: rtl modified.
>;; Predecessors:  ENTRY [100.0%]  (fallthru)
>;; bb 2 artificial_defs: { }
>;; bb 2 artificial_uses: { u0(28){ }u1(32){ }u2(34){ }}
>;; lr  in  	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; lr  use 	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; lr  def 	 24 [r24] 25 [r25] 45
>;; live  in  	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; live  gen 	 24 [r24] 25 [r25] 45
>;; live  kill	
>
>(note 4 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
>
>(note 2 4 3 2 NOTE_INSN_DELETED)
>
>(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
>
>(insn 6 3 19 2 (parallel [
>            (set (reg:HI 45)
>                (plus:HI (reg:HI 24 r24 [ val ])
>                    (const_int 1 [0x1])))
>            (clobber (scratch:QI))
>        ]) add.c:4 42 {addhi3_clobber}
>     (expr_list:REG_DEAD (reg:HI 24 r24 [ val ])
>        (nil)))
>
>(insn 19 6 20 2 (set (reg:QI 24 r24)
>        (subreg:QI (reg:HI 45) 0)) add.c:5 18 {movqi_insn}
>     (nil))
>
>(insn 20 19 14 2 (set (reg:QI 25 r25 [+1 ])
>        (subreg:QI (reg:HI 45) 1)) add.c:5 18 {movqi_insn}
>     (expr_list:REG_DEAD (reg:HI 45)
>        (nil)))
>
>(insn 14 20 0 2 (use (reg/i:HI 24 r24)) add.c:5 -1
>     (nil))
>
>;; Successors:  EXIT [100.0%]  (fallthru)
>;; lr  out 	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; live  out 	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>
>
>
>;; Function sext_hi (sext_hi, funcdef_no=1, decl_uid=1321, cgraph_uid=1)
>
>starting the processing of deferred insns
>ending the processing of deferred insns
>df_analyze called
>Building IRA IR
>starting the processing of deferred insns
>ending the processing of deferred insns
>df_analyze called
>
>Pass 0 for finding pseudo/allocno costs
>
>    a0 (r45,l0) best GENERAL_REGS, allocno GENERAL_REGS
>    a1 (r44,l0) best GENERAL_REGS, allocno GENERAL_REGS
>
>  a0(r45,l0) costs: ADDW_REGS:0 SIMPLE_LD_REGS:0 LD_REGS:0 NO_LD_REGS:0 GENERAL_REGS:0 ALL_REGS:0 MEM:16000
>  a1(r44,l0) costs: POINTER_X_REGS:0 POINTER_Y_REGS:0 POINTER_Z_REGS:0 BASE_POINTER_REGS:0 POINTER_REGS:0 ADDW_REGS:0 SIMPLE_LD_REGS:0 LD_REGS:0 NO_LD_REGS:0 GENERAL_REGS:0 ALL_REGS:0 MEM:8000
>
>
>Pass 1 for finding pseudo/allocno costs
>
>    r45: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
>    r44: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS
>
>  a0(r45,l0) costs: GENERAL_REGS:0 MEM:16000
>  a1(r44,l0) costs: GENERAL_REGS:0 MEM:8000
>
>   Insn 14(l0): point = 0
>   Insn 24(l0): point = 2
>   Insn 23(l0): point = 4
>   Insn 22(l0): point = 6
>   Insn 21(l0): point = 8
>   Insn 6(l0): point = 10
>   Insn 2(l0): point = 12
> a0(r45): [3..10]
> a1(r44 [0]): [11..12]
> a1(r44 [1]): [11..12]
>Compressing live ranges: from 15 to 4 - 26%
>Ranges after the compression:
> a0(r45): [0..1]
> a1(r44 [0]): [2..3]
> a1(r44 [1]): [2..3]
>+++Allocating 8 bytes for conflict table (uncompressed size 12)
>;; a0(r45,l0) conflicts:;; a1(r44,l0) conflicts:
>;;   subobject 0:
>;;     total conflict hard regs:
>;;     conflict hard regs:
>
>
>;;   subobject 1:
>;;     total conflict hard regs:
>;;     conflict hard regs:
>
>  cp0:a0(r45)<->a1(r44)@1000:constraint
>  regions=1, blocks=3, points=4
>    allocnos=2 (big 1), copies=1, conflicts=0, ranges=3
>
>**** Allocnos coloring:
>
>
>  Loop 0 (parent -1, header bb2, depth 0)
>    bbs: 2
>    all: 0r45 1r44
>    modified regnos: 44 45
>    border:
>    Pressure: GENERAL_REGS=7
>    Hard reg set forest:
>      0:( 2-31)@24000
>        1:( 2-21 25-31)@131092000
>      Allocno a0r45 of GENERAL_REGS(30) has 27 avail. regs  2-21 25-31, node:  2-21 25-31 (confl regs =  0 1 22-24 32-34)
>      Allocno a1r44 of GENERAL_REGS(30) has 30 avail. regs  2-31, node:  2-31 obj 0 (confl regs =  0 1 32-34),  obj 1 (confl regs =  0 1 32-34)
>      Pushing a1(r44,l0)(cost 0)
>      Pushing a0(r45,l0)(cost 0)
>      Popping a0(r45,l0)  -- assign reg 16
>      Popping a1(r44,l0)  -- assign reg 16
>Assigning 24 to a1r44
>Disposition:
>    1:r44  l0    24    0:r45  l0    16
>New iteration of spill/restore move
>+++Costs: overall -4000, reg -4000, mem 0, ld 0, st 0, move 0
>+++       move loops 0, new jumps 0
>
>
>sext_hi
>
>Dataflow summary:
>;;  invalidated by call 	 0 [r0] 1 [r1] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 26 [r26] 27 [r27] 30 [r30] 31 [r31] 33 [__SP_H__] 35 [argH]
>;;  hardware regs used 	 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  regular block artificial uses 	 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  eh block artificial uses 	 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  entry block defs 	 8 [r8] 9 [r9] 10 [r10] 11 [r11] 12 [r12] 13 [r13] 14 [r14] 15 [r15] 16 [r16] 17 [r17] 18 [r18] 19 [r19] 20 [r20] 21 [r21] 22 [r22] 23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;;  exit block uses 	 22 [r22] 23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__]
>;;  regs ever live 	 22[r22] 23[r23] 24[r24] 25[r25]
>;;  ref usage 	r8={1d} r9={1d} r10={1d} r11={1d} r12={1d} r13={1d} r14={1d} r15={1d} r16={1d} r17={1d} r18={1d} r19={1d} r20={1d} r21={1d} r22={2d,2u} r23={2d,2u} r24={2d,3u} r25={2d,3u} r28={1d,2u} r32={1d,2u} r34={1d,1u} r44={1d,1u} r45={1d,4u} 
>;;    total ref usage 47{27d,20u,0e} in 7{7 regular + 0 call} insns.
>(note 1 0 4 NOTE_INSN_DELETED)
>
>
>;; Basic block 2 , prev 0, next 1, loop_depth 0, count 0, freq 10000, maybe hot, flags: rtl.
>;; Predecessors:  ENTRY [100.0%]  (fallthru)
>;; bb 2 artificial_defs: { }
>;; bb 2 artificial_uses: { u0(28){ }u1(32){ }u2(34){ }}
>;; lr  in  	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; lr  use 	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; lr  def 	 22 [r22] 23 [r23] 24 [r24] 25 [r25] 44 45
>;; live  in  	 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; live  gen 	 22 [r22] 23 [r23] 24 [r24] 25 [r25] 44 45
>;; live  kill	
>
>(note 4 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
>
>(insn 2 4 3 2 (set (reg/v:HI 44 [ val ])
>        (reg:HI 24 r24 [ val ])) add.c:10 22 {*movhi}
>     (expr_list:REG_DEAD (reg:HI 24 r24 [ val ])
>        (nil)))
>
>(note 3 2 6 2 NOTE_INSN_FUNCTION_BEG)
>
>(insn 6 3 21 2 (set (reg:SI 45 [ val ])
>        (sign_extend:SI (reg/v:HI 44 [ val ]))) add.c:11 227 {extendhisi2}
>     (expr_list:REG_DEAD (reg/v:HI 44 [ val ])
>        (nil)))
>
>(insn 21 6 22 2 (set (reg:QI 22 r22)
>        (subreg:QI (reg:SI 45 [ val ]) 0)) add.c:12 18 {movqi_insn}
>     (nil))
>
>(insn 22 21 23 2 (set (reg:QI 23 r23 [+1 ])
>        (subreg:QI (reg:SI 45 [ val ]) 1)) add.c:12 18 {movqi_insn}
>     (nil))
>
>(insn 23 22 24 2 (set (reg:QI 24 r24 [+2 ])
>        (subreg:QI (reg:SI 45 [ val ]) 2)) add.c:12 18 {movqi_insn}
>     (nil))
>
>(insn 24 23 14 2 (set (reg:QI 25 r25 [+3 ])
>        (subreg:QI (reg:SI 45 [ val ]) 3)) add.c:12 18 {movqi_insn}
>     (expr_list:REG_DEAD (reg:SI 45 [ val ])
>        (nil)))
>
>(insn 14 24 0 2 (use (reg/i:SI 22 r22)) add.c:12 -1
>     (nil))
>
>;; Successors:  EXIT [100.0%]  (fallthru)
>;; lr  out 	 22 [r22] 23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>;; live  out 	 22 [r22] 23 [r23] 24 [r24] 25 [r25] 28 [r28] 32 [__SP_L__] 34 [argL]
>
>

Actions: View

Attachments on bug 52278: 26677 | 26678 | 26679 | 26680