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(-)gcc/config/arm/arm.md (-3 / +11 lines)
 Lines 4217-4222   (define_split Link Here 
4217
  "TARGET_32BIT"
4217
  "TARGET_32BIT"
4218
  [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))]
4218
  [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))]
4219
{
4219
{
4220
  rtx srcop = operands[1];
4220
  rtx lo_part = gen_lowpart (SImode, operands[0]);
4221
  rtx lo_part = gen_lowpart (SImode, operands[0]);
4221
  enum machine_mode src_mode = GET_MODE (operands[1]);
4222
  enum machine_mode src_mode = GET_MODE (operands[1]);
4222
4223
 Lines 4224-4237   (define_split Link Here 
4224
      && !reg_overlap_mentioned_p (operands[0], operands[1]))
4225
      && !reg_overlap_mentioned_p (operands[0], operands[1]))
4225
    emit_clobber (operands[0]);
4226
    emit_clobber (operands[0]);
4226
4227
4228
  if (TARGET_ARM && src_mode == QImode
4229
      && !arm_reg_or_extendqisi_mem_op (srcop, QImode))
4230
    {
4231
      rtx dest = gen_lowpart (QImode, lo_part);
4232
      emit_move_insn (dest, srcop);
4233
      srcop = dest;
4234
    }
4227
  if (!REG_P (lo_part) || src_mode != SImode
4235
  if (!REG_P (lo_part) || src_mode != SImode
4228
      || !rtx_equal_p (lo_part, operands[1]))
4236
      || !rtx_equal_p (lo_part, srcop))
4229
    {
4237
    {
4230
      if (src_mode == SImode)
4238
      if (src_mode == SImode)
4231
        emit_move_insn (lo_part, operands[1]);
4239
        emit_move_insn (lo_part, srcop);
4232
      else
4240
      else
4233
        emit_insn (gen_rtx_SET (VOIDmode, lo_part,
4241
        emit_insn (gen_rtx_SET (VOIDmode, lo_part,
4234
				gen_rtx_SIGN_EXTEND (SImode, operands[1])));
4242
				gen_rtx_SIGN_EXTEND (SImode, srcop)));
4235
      operands[1] = lo_part;
4243
      operands[1] = lo_part;
4236
    }
4244
    }
4237
  operands[0] = gen_highpart (SImode, operands[0]);
4245
  operands[0] = gen_highpart (SImode, operands[0]);

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