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(-)a/gcc/config/arm/arm-protos.h (-1 / +2 lines)
Lines 131-138 extern const char *output_mov_long_double_arm_from_fpa (rtx *); Link Here
131
extern const char *output_mov_long_double_arm_from_arm (rtx *);
131
extern const char *output_mov_long_double_arm_from_arm (rtx *);
132
extern const char *output_mov_double_fpa_from_arm (rtx *);
132
extern const char *output_mov_double_fpa_from_arm (rtx *);
133
extern const char *output_mov_double_arm_from_fpa (rtx *);
133
extern const char *output_mov_double_arm_from_fpa (rtx *);
134
extern const char *output_move_double (rtx *);
134
extern const char *output_move_double (rtx *, int, int *count);
135
extern const char *output_move_quad (rtx *);
135
extern const char *output_move_quad (rtx *);
136
extern int arm_count_output_move_double_insns (rtx *);
136
extern const char *output_move_vfp (rtx *operands);
137
extern const char *output_move_vfp (rtx *operands);
137
extern const char *output_move_neon (rtx *operands);
138
extern const char *output_move_neon (rtx *operands);
138
extern int arm_attr_length_move_neon (rtx);
139
extern int arm_attr_length_move_neon (rtx);
(-)a/gcc/config/arm/arm.c (-73 / +204 lines)
Lines 13262-13272 output_mov_double_arm_from_fpa (rtx *operands) Link Here
13262
/* Output a move between double words.  It must be REG<-MEM
13262
/* Output a move between double words.  It must be REG<-MEM
13263
   or MEM<-REG.  */
13263
   or MEM<-REG.  */
13264
const char *
13264
const char *
13265
output_move_double (rtx *operands)
13265
output_move_double (rtx *operands, int emit, int *count)
13266
{
13266
{
13267
  enum rtx_code code0 = GET_CODE (operands[0]);
13267
  enum rtx_code code0 = GET_CODE (operands[0]);
13268
  enum rtx_code code1 = GET_CODE (operands[1]);
13268
  enum rtx_code code1 = GET_CODE (operands[1]);
13269
  rtx otherops[3];
13269
  rtx otherops[3];
13270
  if (count)
13271
    *count = 1;
13272
13273
  /* The only case when this might happen is when 
13274
     you are looking at the length of a DImode instruction
13275
     that has an invalid constant in it.  */
13276
  if (code0 == REG && code1 != MEM)
13277
    {
13278
      gcc_assert (!emit);
13279
      *count = 2;
13280
      return "";
13281
    }
13282
      
13270
13283
13271
  if (code0 == REG)
13284
  if (code0 == REG)
13272
    {
13285
    {
Lines 13279-13313 output_move_double (rtx *operands) Link Here
13279
      switch (GET_CODE (XEXP (operands[1], 0)))
13292
      switch (GET_CODE (XEXP (operands[1], 0)))
13280
	{
13293
	{
13281
	case REG:
13294
	case REG:
13282
	  if (TARGET_LDRD
13295
13283
	      && !(fix_cm3_ldrd && reg0 == REGNO(XEXP (operands[1], 0))))
13296
	  if (emit)
13284
	    output_asm_insn ("ldr%(d%)\t%0, [%m1]", operands);
13297
	    {
13285
	  else
13298
	      if (TARGET_LDRD
13286
	    output_asm_insn ("ldm%(ia%)\t%m1, %M0", operands);
13299
		  && !(fix_cm3_ldrd && reg0 == REGNO(XEXP (operands[1], 0))))
13300
		output_asm_insn ("ldr%(d%)\t%0, [%m1]", operands);
13301
	      else
13302
		output_asm_insn ("ldm%(ia%)\t%m1, %M0", operands);
13303
	    }
13287
	  break;
13304
	  break;
13288
13305
13289
	case PRE_INC:
13306
	case PRE_INC:
13290
	  gcc_assert (TARGET_LDRD);
13307
	  gcc_assert (TARGET_LDRD);
13291
	  output_asm_insn ("ldr%(d%)\t%0, [%m1, #8]!", operands);
13308
	  if (emit)
13309
	    output_asm_insn ("ldr%(d%)\t%0, [%m1, #8]!", operands);
13310
	  
13292
	  break;
13311
	  break;
13293
13312
13294
	case PRE_DEC:
13313
	case PRE_DEC:
13295
	  if (TARGET_LDRD)
13314
	  if (emit)
13296
	    output_asm_insn ("ldr%(d%)\t%0, [%m1, #-8]!", operands);
13315
	    {
13297
	  else
13316
	      if (TARGET_LDRD)
13298
	    output_asm_insn ("ldm%(db%)\t%m1!, %M0", operands);
13317
		output_asm_insn ("ldr%(d%)\t%0, [%m1, #-8]!", operands);
13318
	      else
13319
		output_asm_insn ("ldm%(db%)\t%m1!, %M0", operands);
13320
	    }
13299
	  break;
13321
	  break;
13300
13322
13301
	case POST_INC:
13323
	case POST_INC:
13302
	  if (TARGET_LDRD)
13324
	  
13303
	    output_asm_insn ("ldr%(d%)\t%0, [%m1], #8", operands);
13325
	  if (emit)
13304
	  else
13326
	    {
13305
	    output_asm_insn ("ldm%(ia%)\t%m1!, %M0", operands);
13327
	      if (TARGET_LDRD)
13328
		output_asm_insn ("ldr%(d%)\t%0, [%m1], #8", operands);
13329
	      else
13330
		output_asm_insn ("ldm%(ia%)\t%m1!, %M0", operands);
13331
	    }
13306
	  break;
13332
	  break;
13307
13333
13308
	case POST_DEC:
13334
	case POST_DEC:
13309
	  gcc_assert (TARGET_LDRD);
13335
	  gcc_assert (TARGET_LDRD);
13310
	  output_asm_insn ("ldr%(d%)\t%0, [%m1], #-8", operands);
13336
	  if (emit)
13337
	    output_asm_insn ("ldr%(d%)\t%0, [%m1], #-8", operands);
13311
	  break;
13338
	  break;
13312
13339
13313
	case PRE_MODIFY:
13340
	case PRE_MODIFY:
Lines 13325-13332 output_move_double (rtx *operands) Link Here
13325
	      if (reg_overlap_mentioned_p (otherops[0], otherops[2]))
13352
	      if (reg_overlap_mentioned_p (otherops[0], otherops[2]))
13326
		{
13353
		{
13327
		  /* Registers overlap so split out the increment.  */
13354
		  /* Registers overlap so split out the increment.  */
13328
		  output_asm_insn ("add%?\t%1, %1, %2", otherops);
13355
		  if (emit)
13329
		  output_asm_insn ("ldr%(d%)\t%0, [%1] @split", otherops);
13356
		    {
13357
		      output_asm_insn ("add%?\t%1, %1, %2", otherops);
13358
		      output_asm_insn ("ldr%(d%)\t%0, [%1] @split", otherops);
13359
		    }
13360
		  if (count)
13361
		    *count = 2;
13330
		}
13362
		}
13331
	      else
13363
	      else
13332
		{
13364
		{
Lines 13337-13347 output_move_double (rtx *operands) Link Here
13337
		      || GET_CODE (otherops[2]) != CONST_INT
13369
		      || GET_CODE (otherops[2]) != CONST_INT
13338
		      || (INTVAL (otherops[2]) > -256
13370
		      || (INTVAL (otherops[2]) > -256
13339
			  && INTVAL (otherops[2]) < 256))
13371
			  && INTVAL (otherops[2]) < 256))
13340
		    output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
13372
		    {
13373
		      if (emit)
13374
			output_asm_insn ("ldr%(d%)\t%0, [%1, %2]!", otherops);
13375
		    }
13341
		  else
13376
		  else
13342
		    {
13377
		    {
13343
		      output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
13378
		      if (emit)
13344
		      output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
13379
			{
13380
			  output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
13381
			  output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
13382
			}
13383
		      if (count)
13384
			*count = 2;
13385
13345
		    }
13386
		    }
13346
		}
13387
		}
13347
	    }
13388
	    }
Lines 13354-13364 output_move_double (rtx *operands) Link Here
13354
		  || GET_CODE (otherops[2]) != CONST_INT
13395
		  || GET_CODE (otherops[2]) != CONST_INT
13355
		  || (INTVAL (otherops[2]) > -256
13396
		  || (INTVAL (otherops[2]) > -256
13356
		      && INTVAL (otherops[2]) < 256))
13397
		      && INTVAL (otherops[2]) < 256))
13357
		output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
13398
		{
13399
		  if (emit)
13400
		    output_asm_insn ("ldr%(d%)\t%0, [%1], %2", otherops);
13401
		}
13358
	      else
13402
	      else
13359
		{
13403
		{
13360
		  output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
13404
		  if (emit)
13361
		  output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
13405
		    {
13406
		      output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
13407
		      output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
13408
		    }
13409
		  if (count)
13410
		    *count = 2;
13362
		}
13411
		}
13363
	    }
13412
	    }
13364
	  break;
13413
	  break;
Lines 13371-13382 output_move_double (rtx *operands) Link Here
13371
	  /* Use the second register of the pair to avoid problematic
13420
	  /* Use the second register of the pair to avoid problematic
13372
	     overlap.  */
13421
	     overlap.  */
13373
	  otherops[1] = operands[1];
13422
	  otherops[1] = operands[1];
13374
	  output_asm_insn ("adr%?\t%0, %1", otherops);
13423
	  if (emit)
13424
	    output_asm_insn ("adr%?\t%0, %1", otherops);
13375
	  operands[1] = otherops[0];
13425
	  operands[1] = otherops[0];
13376
	  if (TARGET_LDRD)
13426
	  if (emit)
13377
	    output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
13427
	    {
13378
	  else
13428
	      if (TARGET_LDRD)
13379
	    output_asm_insn ("ldm%(ia%)\t%1, %M0", operands);
13429
		output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
13430
	      else
13431
		output_asm_insn ("ldm%(ia%)\t%1, %M0", operands);
13432
	    }
13433
13434
	  if (count)
13435
	    *count = 2;
13380
	  break;
13436
	  break;
13381
13437
13382
	  /* ??? This needs checking for thumb2.  */
13438
	  /* ??? This needs checking for thumb2.  */
Lines 13395-13411 output_move_double (rtx *operands) Link Here
13395
		      switch ((int) INTVAL (otherops[2]))
13451
		      switch ((int) INTVAL (otherops[2]))
13396
			{
13452
			{
13397
			case -8:
13453
			case -8:
13398
			  output_asm_insn ("ldm%(db%)\t%1, %M0", otherops);
13454
			  if (emit)
13455
			    output_asm_insn ("ldm%(db%)\t%1, %M0", otherops);
13399
			  return "";
13456
			  return "";
13400
			case -4:
13457
			case -4:
13401
			  if (TARGET_THUMB2)
13458
			  if (TARGET_THUMB2)
13402
			    break;
13459
			    break;
13403
			  output_asm_insn ("ldm%(da%)\t%1, %M0", otherops);
13460
			  if (emit)
13461
			    output_asm_insn ("ldm%(da%)\t%1, %M0", otherops);
13404
			  return "";
13462
			  return "";
13405
			case 4:
13463
			case 4:
13406
			  if (TARGET_THUMB2)
13464
			  if (TARGET_THUMB2)
13407
			    break;
13465
			    break;
13408
			  output_asm_insn ("ldm%(ib%)\t%1, %M0", otherops);
13466
			  if (emit)
13467
			    output_asm_insn ("ldm%(ib%)\t%1, %M0", otherops);
13409
			  return "";
13468
			  return "";
13410
			}
13469
			}
13411
		    }
13470
		    }
Lines 13433-13466 output_move_double (rtx *operands) Link Here
13433
		      if (reg_overlap_mentioned_p (operands[0], otherops[2])
13492
		      if (reg_overlap_mentioned_p (operands[0], otherops[2])
13434
			  || (fix_cm3_ldrd && reg0 == REGNO (otherops[1])))
13493
			  || (fix_cm3_ldrd && reg0 == REGNO (otherops[1])))
13435
			{
13494
			{
13436
			  output_asm_insn ("add%?\t%0, %1, %2", otherops);
13495
			  if (emit)
13437
			  output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
13496
			    {
13497
			      output_asm_insn ("add%?\t%0, %1, %2", otherops);
13498
			      output_asm_insn ("ldr%(d%)\t%0, [%1]", operands);
13499
			    }
13500
			  if (count)
13501
			    *count = 2;
13438
			}
13502
			}
13439
		      else
13503
		      else
13440
			{
13504
			{
13441
			  otherops[0] = operands[0];
13505
			  otherops[0] = operands[0];
13442
			  output_asm_insn ("ldr%(d%)\t%0, [%1, %2]", otherops);
13506
			  if (emit)
13507
			    output_asm_insn ("ldr%(d%)\t%0, [%1, %2]", otherops);
13443
			}
13508
			}
13444
		      return "";
13509
		      return "";
13445
		    }
13510
		    }
13446
13511
13447
		  if (GET_CODE (otherops[2]) == CONST_INT)
13512
		  if (GET_CODE (otherops[2]) == CONST_INT)
13513
		    {							
13514
		      if (emit)
13515
			{
13516
			  if (!(const_ok_for_arm (INTVAL (otherops[2]))))
13517
			    output_asm_insn ("sub%?\t%0, %1, #%n2", otherops);
13518
			  else
13519
			    output_asm_insn ("add%?\t%0, %1, %2", otherops);
13520
			}
13521
			
13522
		    }
13523
		  else
13448
		    {
13524
		    {
13449
		      if (!(const_ok_for_arm (INTVAL (otherops[2]))))
13525
		      if (emit)
13450
			output_asm_insn ("sub%?\t%0, %1, #%n2", otherops);
13451
		      else
13452
			output_asm_insn ("add%?\t%0, %1, %2", otherops);
13526
			output_asm_insn ("add%?\t%0, %1, %2", otherops);
13453
		    }
13527
		    }
13454
		  else
13455
		    output_asm_insn ("add%?\t%0, %1, %2", otherops);
13456
		}
13528
		}
13457
	      else
13529
	      else
13458
		output_asm_insn ("sub%?\t%0, %1, %2", otherops);
13530
		{
13531
		  if (emit)
13532
		    output_asm_insn ("sub%?\t%0, %1, %2", otherops);
13533
		}
13459
13534
13460
	      if (TARGET_LDRD)
13535
	      if (TARGET_LDRD)
13461
		return "ldr%(d%)\t%0, [%1]";
13536
		return "ldr%(d%)\t%0, [%1]";
13462
13537
	      
13463
	      return "ldm%(ia%)\t%1, %M0";
13538
		return "ldm%(ia%)\t%1, %M0";
13464
	    }
13539
	    }
13465
	  else
13540
	  else
13466
	    {
13541
	    {
Lines 13468-13480 output_move_double (rtx *operands) Link Here
13468
	      /* Take care of overlapping base/data reg.  */
13543
	      /* Take care of overlapping base/data reg.  */
13469
	      if (reg_mentioned_p (operands[0], operands[1]))
13544
	      if (reg_mentioned_p (operands[0], operands[1]))
13470
		{
13545
		{
13471
		  output_asm_insn ("ldr%?\t%0, %1", otherops);
13546
		  if (emit)
13472
		  output_asm_insn ("ldr%?\t%0, %1", operands);
13547
		    {
13548
		      output_asm_insn ("ldr%?\t%0, %1", otherops);
13549
		      output_asm_insn ("ldr%?\t%0, %1", operands);
13550
		    }
13551
		  if (count)
13552
		    *count = 2;
13553
13473
		}
13554
		}
13474
	      else
13555
	      else
13475
		{
13556
		{
13476
		  output_asm_insn ("ldr%?\t%0, %1", operands);
13557
		  if (emit)
13477
		  output_asm_insn ("ldr%?\t%0, %1", otherops);
13558
		    {
13559
		      output_asm_insn ("ldr%?\t%0, %1", operands);
13560
		      output_asm_insn ("ldr%?\t%0, %1", otherops);
13561
		    }
13562
		  if (count)
13563
		    *count = 2;
13478
		}
13564
		}
13479
	    }
13565
	    }
13480
	}
13566
	}
Lines 13488-13521 output_move_double (rtx *operands) Link Here
13488
      switch (GET_CODE (XEXP (operands[0], 0)))
13574
      switch (GET_CODE (XEXP (operands[0], 0)))
13489
        {
13575
        {
13490
	case REG:
13576
	case REG:
13491
	  if (TARGET_LDRD)
13577
	  if (emit)
13492
	    output_asm_insn ("str%(d%)\t%1, [%m0]", operands);
13578
	    {
13493
	  else
13579
	      if (TARGET_LDRD)
13494
	    output_asm_insn ("stm%(ia%)\t%m0, %M1", operands);
13580
		output_asm_insn ("str%(d%)\t%1, [%m0]", operands);
13581
	      else
13582
		output_asm_insn ("stm%(ia%)\t%m0, %M1", operands);
13583
	    }
13495
	  break;
13584
	  break;
13496
13585
13497
        case PRE_INC:
13586
        case PRE_INC:
13498
	  gcc_assert (TARGET_LDRD);
13587
	  gcc_assert (TARGET_LDRD);
13499
	  output_asm_insn ("str%(d%)\t%1, [%m0, #8]!", operands);
13588
	  if (emit)
13589
	    output_asm_insn ("str%(d%)\t%1, [%m0, #8]!", operands);
13500
	  break;
13590
	  break;
13501
13591
13502
        case PRE_DEC:
13592
        case PRE_DEC:
13503
	  if (TARGET_LDRD)
13593
	  if (emit)
13504
	    output_asm_insn ("str%(d%)\t%1, [%m0, #-8]!", operands);
13594
	    {
13505
	  else
13595
	      if (TARGET_LDRD)
13506
	    output_asm_insn ("stm%(db%)\t%m0!, %M1", operands);
13596
		output_asm_insn ("str%(d%)\t%1, [%m0, #-8]!", operands);
13597
	      else
13598
		output_asm_insn ("stm%(db%)\t%m0!, %M1", operands);
13599
	    }
13507
	  break;
13600
	  break;
13508
13601
13509
        case POST_INC:
13602
        case POST_INC:
13510
	  if (TARGET_LDRD)
13603
	  if (emit)
13511
	    output_asm_insn ("str%(d%)\t%1, [%m0], #8", operands);
13604
	    {
13512
	  else
13605
	      if (TARGET_LDRD)
13513
	    output_asm_insn ("stm%(ia%)\t%m0!, %M1", operands);
13606
		output_asm_insn ("str%(d%)\t%1, [%m0], #8", operands);
13607
	      else
13608
		output_asm_insn ("stm%(ia%)\t%m0!, %M1", operands);
13609
	    }
13514
	  break;
13610
	  break;
13515
13611
13516
        case POST_DEC:
13612
        case POST_DEC:
13517
	  gcc_assert (TARGET_LDRD);
13613
	  gcc_assert (TARGET_LDRD);
13518
	  output_asm_insn ("str%(d%)\t%1, [%m0], #-8", operands);
13614
	  if (emit)
13615
	    output_asm_insn ("str%(d%)\t%1, [%m0], #-8", operands);
13519
	  break;
13616
	  break;
13520
13617
13521
	case PRE_MODIFY:
13618
	case PRE_MODIFY:
Lines 13533-13551 output_move_double (rtx *operands) Link Here
13533
	    {
13630
	    {
13534
	      if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
13631
	      if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
13535
		{
13632
		{
13536
		  output_asm_insn ("str%?\t%0, [%1, %2]!", otherops);
13633
		  if (emit)
13537
		  output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
13634
		    {
13635
		      output_asm_insn ("str%?\t%0, [%1, %2]!", otherops);
13636
		      output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
13637
		    }
13638
		  if (count)
13639
		    *count = 2;
13538
		}
13640
		}
13539
	      else
13641
	      else
13540
		{
13642
		{
13541
		  output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
13643
		  if (emit)
13542
		  output_asm_insn ("str%?\t%0, [%1], %2", otherops);
13644
		    {
13645
		      output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
13646
		      output_asm_insn ("str%?\t%0, [%1], %2", otherops);
13647
		    }
13648
		  if (count)
13649
		    *count = 2;
13543
		}
13650
		}
13544
	    }
13651
	    }
13545
	  else if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
13652
	  else if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
13546
	    output_asm_insn ("str%(d%)\t%0, [%1, %2]!", otherops);
13653
	    {
13654
	      if (emit)
13655
		output_asm_insn ("str%(d%)\t%0, [%1, %2]!", otherops);
13656
	    }
13547
	  else
13657
	  else
13548
	    output_asm_insn ("str%(d%)\t%0, [%1], %2", otherops);
13658
	    {
13659
	      if (emit)
13660
		output_asm_insn ("str%(d%)\t%0, [%1], %2", otherops);
13661
	    }
13549
	  break;
13662
	  break;
13550
13663
13551
	case PLUS:
13664
	case PLUS:
Lines 13555-13573 output_move_double (rtx *operands) Link Here
13555
	      switch ((int) INTVAL (XEXP (XEXP (operands[0], 0), 1)))
13668
	      switch ((int) INTVAL (XEXP (XEXP (operands[0], 0), 1)))
13556
		{
13669
		{
13557
		case -8:
13670
		case -8:
13558
		  output_asm_insn ("stm%(db%)\t%m0, %M1", operands);
13671
		  if (emit)
13672
		    output_asm_insn ("stm%(db%)\t%m0, %M1", operands);
13559
		  return "";
13673
		  return "";
13560
13674
13561
		case -4:
13675
		case -4:
13562
		  if (TARGET_THUMB2)
13676
		  if (TARGET_THUMB2)
13563
		    break;
13677
		    break;
13564
		  output_asm_insn ("stm%(da%)\t%m0, %M1", operands);
13678
		  if (emit)
13679
		    output_asm_insn ("stm%(da%)\t%m0, %M1", operands);
13565
		  return "";
13680
		  return "";
13566
13681
13567
		case 4:
13682
		case 4:
13568
		  if (TARGET_THUMB2)
13683
		  if (TARGET_THUMB2)
13569
		    break;
13684
		    break;
13570
		  output_asm_insn ("stm%(ib%)\t%m0, %M1", operands);
13685
		  if (emit)
13686
		    output_asm_insn ("stm%(ib%)\t%m0, %M1", operands);
13571
		  return "";
13687
		  return "";
13572
		}
13688
		}
13573
	    }
13689
	    }
Lines 13580-13586 output_move_double (rtx *operands) Link Here
13580
	    {
13696
	    {
13581
	      otherops[0] = operands[1];
13697
	      otherops[0] = operands[1];
13582
	      otherops[1] = XEXP (XEXP (operands[0], 0), 0);
13698
	      otherops[1] = XEXP (XEXP (operands[0], 0), 0);
13583
	      output_asm_insn ("str%(d%)\t%0, [%1, %2]", otherops);
13699
	      if (emit)
13700
		output_asm_insn ("str%(d%)\t%0, [%1, %2]", otherops);
13584
	      return "";
13701
	      return "";
13585
	    }
13702
	    }
13586
	  /* Fall through */
13703
	  /* Fall through */
Lines 13588-13595 output_move_double (rtx *operands) Link Here
13588
        default:
13705
        default:
13589
	  otherops[0] = adjust_address (operands[0], SImode, 4);
13706
	  otherops[0] = adjust_address (operands[0], SImode, 4);
13590
	  otherops[1] = operands[1];
13707
	  otherops[1] = operands[1];
13591
	  output_asm_insn ("str%?\t%1, %0", operands);
13708
	  if (emit)
13592
	  output_asm_insn ("str%?\t%H1, %0", otherops);
13709
	    {
13710
	      output_asm_insn ("str%?\t%1, %0", operands);
13711
	      output_asm_insn ("str%?\t%H1, %0", otherops);
13712
	    }
13713
	  if (count)
13714
	    *count = 2;
13715
13593
	}
13716
	}
13594
    }
13717
    }
13595
13718
Lines 24183-24186 arm_attr_length_push_multi(rtx parallel_op, rtx first_op) Link Here
24183
  return 4;
24306
  return 4;
24184
}
24307
}
24185
24308
24309
int
24310
arm_count_output_move_double_insns (rtx *operands)
24311
{
24312
  int count;
24313
  output_move_double (operands, 0, &count);
24314
  return count * 4;
24315
}
24316
24186
#include "gt-arm.h"
24317
#include "gt-arm.h"
(-)a/gcc/config/arm/arm.md (-2 / +3 lines)
Lines 4981-4987 Link Here
4981
    case 2:
4981
    case 2:
4982
      return \"#\";
4982
      return \"#\";
4983
    default:
4983
    default:
4984
      return output_move_double (operands);
4984
      return output_move_double (operands, 1, NULL);
4985
    }
4985
    }
4986
  "
4986
  "
4987
  [(set_attr "length" "8,12,16,8,8")
4987
  [(set_attr "length" "8,12,16,8,8")
Lines 6341-6347 Link Here
6341
    case 2:
6341
    case 2:
6342
      return \"#\";
6342
      return \"#\";
6343
    default:
6343
    default:
6344
      return output_move_double (operands);
6344
      return output_move_double (operands, 1, NULL);
6345
    }
6345
    }
6346
  "
6346
  "
6347
  [(set_attr "length" "8,12,16,8,8")
6347
  [(set_attr "length" "8,12,16,8,8")
Lines 10398-10403 Link Here
10398
  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
10398
  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
10399
	(if_then_else:SI (match_operator 4 "arm_comparison_operator"
10399
	(if_then_else:SI (match_operator 4 "arm_comparison_operator"
10400
			  [(match_operand 3 "cc_register" "") (const_int 0)])
10400
			  [(match_operand 3 "cc_register" "") (const_int 0)])
10401
10401
			 (match_operand:SI 1 "arm_rhs_operand" "0,?rI")
10402
			 (match_operand:SI 1 "arm_rhs_operand" "0,?rI")
10402
			 (not:SI
10403
			 (not:SI
10403
			  (match_operand:SI 2 "s_register_operand" "r,r"))))]
10404
			  (match_operand:SI 2 "s_register_operand" "r,r"))))]
(-)a/gcc/config/arm/cirrus.md (-4 / +4 lines)
Lines 379-385 Link Here
379
      return \"#\";
379
      return \"#\";
380
    case 1:
380
    case 1:
381
    case 2:
381
    case 2:
382
      return output_move_double (operands);
382
      return output_move_double (operands, 1, NULL);
383
383
384
    case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\";
384
    case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\";
385
    case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\";
385
    case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\";
Lines 439-445 Link Here
439
    case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
439
    case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
440
    case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
440
    case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
441
    case 2: return \"#\";
441
    case 2: return \"#\";
442
    case 3: case 4: return output_move_double (operands);
442
    case 3: case 4: return output_move_double (operands, 1, NULL);
443
    case 5: return \"cfcpyd%?\\t%V0, %V1\";
443
    case 5: return \"cfcpyd%?\\t%V0, %V1\";
444
    case 6: return \"cfldrd%?\\t%V0, %1\";
444
    case 6: return \"cfldrd%?\\t%V0, %1\";
445
    case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
445
    case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
Lines 466-472 Link Here
466
    case 0:
466
    case 0:
467
    case 1:
467
    case 1:
468
    case 2:
468
    case 2:
469
      return (output_move_double (operands));
469
      return (output_move_double (operands, 1, NULL));
470
470
471
    case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\";
471
    case 3: return \"cfmv64lr%?\\t%V0, %Q1\;cfmv64hr%?\\t%V0, %R1\";
472
    case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\";
472
    case 4: return \"cfmvr64l%?\\t%Q0, %V1\;cfmvr64h%?\\t%R0, %V1\";
Lines 522-528 Link Here
522
    {
522
    {
523
    case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
523
    case 0: return \"ldm%?ia\\t%m1, %M0\\t%@ double\";
524
    case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
524
    case 1: return \"stm%?ia\\t%m0, %M1\\t%@ double\";
525
    case 2: case 3: case 4: return output_move_double (operands);
525
    case 2: case 3: case 4: return output_move_double (operands, 1, NULL);
526
    case 5: return \"cfcpyd%?\\t%V0, %V1\";
526
    case 5: return \"cfcpyd%?\\t%V0, %V1\";
527
    case 6: return \"cfldrd%?\\t%V0, %1\";
527
    case 6: return \"cfldrd%?\\t%V0, %1\";
528
    case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
528
    case 7: return \"cfmvdlr\\t%V0, %Q1\;cfmvdhr%?\\t%V0, %R1\";
(-)a/gcc/config/arm/fpa.md (-2 / +2 lines)
Lines 567-573 Link Here
567
    case 0: return \"ldm%(ia%)\\t%m1, %M0\\t%@ double\";
567
    case 0: return \"ldm%(ia%)\\t%m1, %M0\\t%@ double\";
568
    case 1: return \"stm%(ia%)\\t%m0, %M1\\t%@ double\";
568
    case 1: return \"stm%(ia%)\\t%m0, %M1\\t%@ double\";
569
    case 2: return \"#\";
569
    case 2: return \"#\";
570
    case 3: case 4: return output_move_double (operands);
570
    case 3: case 4: return output_move_double (operands, 1, NULL);
571
    case 5: return \"mvf%?d\\t%0, %1\";
571
    case 5: return \"mvf%?d\\t%0, %1\";
572
    case 6: return \"mnf%?d\\t%0, #%N1\";
572
    case 6: return \"mnf%?d\\t%0, #%N1\";
573
    case 7: return \"ldf%?d\\t%0, %1\";
573
    case 7: return \"ldf%?d\\t%0, %1\";
Lines 657-663 Link Here
657
    default:
657
    default:
658
    case 0: return \"ldm%(ia%)\\t%m1, %M0\\t%@ double\";
658
    case 0: return \"ldm%(ia%)\\t%m1, %M0\\t%@ double\";
659
    case 1: return \"stm%(ia%)\\t%m0, %M1\\t%@ double\";
659
    case 1: return \"stm%(ia%)\\t%m0, %M1\\t%@ double\";
660
    case 2: case 3: case 4: return output_move_double (operands);
660
    case 2: case 3: case 4: return output_move_double (operands, 1, NULL);
661
    case 5: return \"mvf%?d\\t%0, %1\";
661
    case 5: return \"mvf%?d\\t%0, %1\";
662
    case 6: return \"mnf%?d\\t%0, #%N1\";
662
    case 6: return \"mnf%?d\\t%0, #%N1\";
663
    case 7: return \"ldf%?d\\t%0, %1\";
663
    case 7: return \"ldf%?d\\t%0, %1\";
(-)a/gcc/config/arm/iwmmxt.md (-2 / +2 lines)
Lines 76-82 Link Here
76
  switch (which_alternative)
76
  switch (which_alternative)
77
    {
77
    {
78
    default:
78
    default:
79
      return output_move_double (operands);
79
      return output_move_double (operands, 1, NULL);
80
    case 0:
80
    case 0:
81
      return \"#\";
81
      return \"#\";
82
    case 3:
82
    case 3:
Lines 173-179 Link Here
173
   case 3: return \"tmrrc%?\\t%Q0, %R0, %1\";
173
   case 3: return \"tmrrc%?\\t%Q0, %R0, %1\";
174
   case 4: return \"tmcrr%?\\t%0, %Q1, %R1\";
174
   case 4: return \"tmcrr%?\\t%0, %Q1, %R1\";
175
   case 5: return \"#\";
175
   case 5: return \"#\";
176
   default: return output_move_double (operands);
176
   default: return output_move_double (operands, 1, NULL);
177
   }"
177
   }"
178
  [(set_attr "predicable" "yes")
178
  [(set_attr "predicable" "yes")
179
   (set_attr "length"         "4,     4,   4,4,4,8,   8,8")
179
   (set_attr "length"         "4,     4,   4,4,4,8,   8,8")
(-)a/gcc/config/arm/neon.md (-1 / +1 lines)
Lines 190-196 Link Here
190
    case 2: gcc_unreachable ();
190
    case 2: gcc_unreachable ();
191
    case 4: return "vmov\t%Q0, %R0, %P1  @ <mode>";
191
    case 4: return "vmov\t%Q0, %R0, %P1  @ <mode>";
192
    case 5: return "vmov\t%P0, %Q1, %R1  @ <mode>";
192
    case 5: return "vmov\t%P0, %Q1, %R1  @ <mode>";
193
    default: return output_move_double (operands);
193
    default: return output_move_double (operands, 1, NULL);
194
    }
194
    }
195
}
195
}
196
 [(set_attr "neon_type" "neon_int_1,*,neon_vmov,*,neon_mrrc,neon_mcr_2_mcrr,*,*,*")
196
 [(set_attr "neon_type" "neon_int_1,*,neon_vmov,*,neon_mrrc,neon_mcr_2_mcrr,*,*,*")
(-)a/gcc/config/arm/vfp.md (-5 / +11 lines)
Lines 150-156 Link Here
150
    case 4:
150
    case 4:
151
    case 5:
151
    case 5:
152
    case 6:
152
    case 6:
153
      return output_move_double (operands);
153
      return output_move_double (operands, 1, NULL);
154
    case 7:
154
    case 7:
155
      return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
155
      return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
156
    case 8:
156
    case 8:
Lines 199-205 Link Here
199
    case 4:
199
    case 4:
200
    case 5:
200
    case 5:
201
    case 6:
201
    case 6:
202
      return output_move_double (operands);
202
      return output_move_double (operands, 1, NULL);
203
    case 7:
203
    case 7:
204
      return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
204
      return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
205
    case 8:
205
    case 8:
Lines 213-222 Link Here
213
    }
213
    }
214
  "
214
  "
215
  [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
215
  [(set_attr "type" "*,*,*,*,load2,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
216
   (set_attr "length" "4,8,12,16,8,8,8,4,4,4,4,4")
216
;;   (set (attr "length" "4,8,12,16,8,8,8,4,4,4,4,4")
217
   (set (attr "length") (cond [(eq_attr "alternative" "1") (const_int 8)
218
                               (eq_attr "alternative" "2") (const_int 12)
219
                               (eq_attr "alternative" "3") (const_int 16)
220
                               (eq_attr "alternative" "4,5,6") (symbol_ref "arm_count_output_move_double_insns (operands)")]
221
                              (const_int 4)))
217
   (set_attr "predicable"    "yes")
222
   (set_attr "predicable"    "yes")
218
   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,1020,*")
223
   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,1020,*")
219
   (set_attr "neg_pool_range" "*,*,*,*,1008,0,*,*,*,*,1008,*")
224
   (set_attr "neg_pool_range" "*,*,*,*,1008,0,*,*,*,*,1008,*")
225
   (set (attr "ce_count") (symbol_ref "get_attr_length (insn) / 4"))
220
   (set_attr "arch"           "t2,any,any,any,a,t2,any,any,any,any,any,any")]
226
   (set_attr "arch"           "t2,any,any,any,a,t2,any,any,any,any,any,any")]
221
 )
227
 )
222
228
Lines 427-433 Link Here
427
      case 3: case 4:
433
      case 3: case 4:
428
	return output_move_vfp (operands);
434
	return output_move_vfp (operands);
429
      case 5: case 6:
435
      case 5: case 6:
430
	return output_move_double (operands);
436
	return output_move_double (operands, 1, NULL);
431
      case 7:
437
      case 7:
432
	if (TARGET_VFP_SINGLE)
438
	if (TARGET_VFP_SINGLE)
433
	  return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
439
	  return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
Lines 473-479 Link Here
473
      case 3: case 4:
479
      case 3: case 4:
474
	return output_move_vfp (operands);
480
	return output_move_vfp (operands);
475
      case 5: case 6: case 8:
481
      case 5: case 6: case 8:
476
	return output_move_double (operands);
482
	return output_move_double (operands, 1, NULL);
477
      case 7:
483
      case 7:
478
	if (TARGET_VFP_SINGLE)
484
	if (TARGET_VFP_SINGLE)
479
	  return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
485
	  return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";

Return to bug 50022