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(-)gcc/fwprop.c.jj (-4 / +101 lines)
Lines 1-5 Link Here
1
/* RTL-based forward propagation pass for GNU compiler.
1
/* RTL-based forward propagation pass for GNU compiler.
2
   Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
2
   Copyright (C) 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
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   Contributed by Paolo Bonzini and Steven Bosscher.
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   Contributed by Paolo Bonzini and Steven Bosscher.
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This file is part of GCC.
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This file is part of GCC.
Lines 852-857 forward_propagate_subreg (df_ref use, rt Link Here
852
    return false;
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    return false;
853
}
853
}
854
854
855
static int
856
check_reg_count_callback (rtx *px, void *data)
857
{
858
  int *regnop = (int *) data;
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  if (!REG_P (*px))
861
    return 0;
862
863
  if (*regnop < 0 || *regnop == (int) REGNO (*px))
864
    {
865
      *regnop = REGNO (*px);
866
      return 0;
867
    }
868
869
  return 1;
870
}
871
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/* Try to replace USE with SRC (defined in DEF_INSN) in __asm.  */
873
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static bool
875
forward_propagate_asm (df_ref use, rtx def_set, rtx reg)
876
{
877
  rtx use_insn = DF_REF_INSN (use), src, use_pat, asm_operands, new_rtx, *loc;
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  int regno, speed_p, i;
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  gcc_assert ((DF_REF_FLAGS (use) & DF_REF_IN_NOTE) == 0);
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  src = SET_SRC (def_set);
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  use_pat = PATTERN (use_insn);
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  /* In __asm don't replace if src might need more registers than
886
     reg, as that could increase register pressure on the __asm.  */
887
  regno = -1;
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  if (for_each_rtx (&src, check_reg_count_callback, &regno) > 0)
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    return false;
890
891
  speed_p = optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn));
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  asm_operands = NULL_RTX;
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  switch (GET_CODE (use_pat))
894
    {
895
    case ASM_OPERANDS:
896
      asm_operands = use_pat;
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      break;
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    case SET:
899
      loc = &SET_DEST (use_pat);
900
      new_rtx = propagate_rtx (*loc, GET_MODE (*loc), reg, src, speed_p);
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      if (new_rtx)
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	validate_unshare_change (use_insn, loc, new_rtx, true);
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      asm_operands = SET_SRC (use_pat);
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      break;
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    case PARALLEL:
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      for (i = 0; i < XVECLEN (use_pat, 0); i++)
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	if (GET_CODE (XVECEXP (use_pat, 0, i)) == SET)
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	  {
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	    loc = &SET_DEST (XVECEXP (use_pat, 0, i));
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	    new_rtx = propagate_rtx (*loc, GET_MODE (*loc), reg, src, speed_p);
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	    if (new_rtx)
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	      validate_unshare_change (use_insn, loc, new_rtx, true);
913
	    asm_operands = SET_SRC (XVECEXP (use_pat, 0, i));
914
	  }
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	else if (GET_CODE (XVECEXP (use_pat, 0, i)) == ASM_OPERANDS)
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	  asm_operands = XVECEXP (use_pat, 0, i);
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      break;
918
    default:
919
      gcc_unreachable ();
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    }
921
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  gcc_assert (asm_operands && GET_CODE (asm_operands) == ASM_OPERANDS);
923
  for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (asm_operands); i++)
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    {
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      loc = &ASM_OPERANDS_INPUT (asm_operands, i);
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      new_rtx = propagate_rtx (*loc, GET_MODE (*loc), reg, src, speed_p);
927
      if (new_rtx)
928
	validate_unshare_change (use_insn, loc, new_rtx, true);
929
    }
930
931
  if (num_changes_pending () == 0)
932
    return false;
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934
  if (!verify_changes (0))
935
    {
936
      cancel_changes (0);
937
      return 0;
938
    }
939
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  confirm_change_group ();
941
  num_changes++;
942
  return true;
943
}
944
855
/* Try to replace USE with SRC (defined in DEF_INSN) and simplify the
945
/* Try to replace USE with SRC (defined in DEF_INSN) and simplify the
856
   result.  */
946
   result.  */
857
947
Lines 863-874 forward_propagate_and_simplify (df_ref u Link Here
863
  rtx src, reg, new_rtx, *loc;
953
  rtx src, reg, new_rtx, *loc;
864
  bool set_reg_equal;
954
  bool set_reg_equal;
865
  enum machine_mode mode;
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  enum machine_mode mode;
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  int asm_use = -1;
866
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867
  if (!use_set)
958
  if (INSN_CODE (use_insn) < 0)
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    asm_use = asm_noperands (PATTERN (use_insn));
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961
  if (!use_set && asm_use < 0)
868
    return false;
962
    return false;
869
963
870
  /* Do not propagate into PC, CC0, etc.  */
964
  /* Do not propagate into PC, CC0, etc.  */
871
  if (GET_MODE (SET_DEST (use_set)) == VOIDmode)
965
  if (use_set && GET_MODE (SET_DEST (use_set)) == VOIDmode)
872
    return false;
966
    return false;
873
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874
  /* If def and use are subreg, check if they match.  */
968
  /* If def and use are subreg, check if they match.  */
Lines 900-906 forward_propagate_and_simplify (df_ref u Link Here
900
  if (MEM_P (src) && MEM_READONLY_P (src))
994
  if (MEM_P (src) && MEM_READONLY_P (src))
901
    {
995
    {
902
      rtx x = avoid_constant_pool_reference (src);
996
      rtx x = avoid_constant_pool_reference (src);
903
      if (x != src)
997
      if (x != src && use_set)
904
	{
998
	{
905
          rtx note = find_reg_note (use_insn, REG_EQUAL, NULL_RTX);
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          rtx note = find_reg_note (use_insn, REG_EQUAL, NULL_RTX);
906
	  rtx old_rtx = note ? XEXP (note, 0) : SET_SRC (use_set);
1000
	  rtx old_rtx = note ? XEXP (note, 0) : SET_SRC (use_set);
Lines 911-916 forward_propagate_and_simplify (df_ref u Link Here
911
      return false;
1005
      return false;
912
    }
1006
    }
913
1007
1008
  if (asm_use >= 0)
1009
    return forward_propagate_asm (use, def_set, reg);
1010
914
  /* Else try simplifying.  */
1011
  /* Else try simplifying.  */
915
1012
916
  if (DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE)
1013
  if (DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE)
(-)gcc/testsuite/gcc.target/i386/pr39543-1.c.jj (+52 lines)
Line 0 Link Here
1
/* PR rtl-optimization/39543 */
2
/* { dg-do compile } */
3
/* { dg-options "-O3 -fomit-frame-pointer" } */
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5
float __attribute__ ((aligned (16))) s0[128];
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const float s1 = 0.707;
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float s2[8] __attribute__ ((aligned (16)));
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float s3[8] __attribute__ ((aligned (16)));
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float s4[16] __attribute__ ((aligned (16)));
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float s5[16] __attribute__ ((aligned (16)));
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12
void
13
foo (int k, float *x, float *y, const float *d, const float *z)
14
{
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  float *a, *b, *c, *e;
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17
  a = x + 2 * k;
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  b = a + 2 * k;
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  c = b + 2 * k;
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  e = y + 2 * k;
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  __asm__ volatile (""
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		    : "=m" (x[0]), "=m" (b[0]), "=m" (a[0]), "=m" (c[0])
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		    : "m" (y[0]), "m" (y[k * 2]), "m" (x[0]), "m" (a[0])
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		    : "memory");
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  for (;;)
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    {
27
      __asm__ volatile (""
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			:
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			: "m" (y[2]), "m" (d[2]), "m" (e[2]), "m" (z[2])
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                        : "memory");
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      if (!--k)
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	break;
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    }
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  __asm__ volatile (""
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		    : "=m" (x[2]), "=m" (x[10]), "=m" (x[6]), "=m" (x[14])
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		    : "m" (y[2]), "m" (y[6]), "m" (x[2]), "m" (x[6]),
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		      "m" (y[18]), "m" (s1)
38
		    : "memory");
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}
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void
42
bar (float *a)
43
{
44
  foo (4, a, a + 16, s2, s3);
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  foo (8, a, a + 32, s4, s5);
46
}
47
48
void
49
baz (void)
50
{
51
  bar (s0);
52
}
(-)gcc/testsuite/gcc.target/i386/pr39543-2.c.jj (+51 lines)
Line 0 Link Here
1
/* PR rtl-optimization/39543 */
2
/* { dg-do compile } */
3
/* { dg-options "-O3" } */
4
5
float __attribute__ ((aligned (16))) s0[128];
6
const float s1 = 0.707;
7
float s2[8] __attribute__ ((aligned (16)));
8
float s3[8] __attribute__ ((aligned (16)));
9
float s4[16] __attribute__ ((aligned (16)));
10
float s5[16] __attribute__ ((aligned (16)));
11
12
void
13
foo (int k, float *x, float *y, const float *d, const float *z)
14
{
15
  float *a, *b, *c, *e;
16
17
  a = x + 2 * k;
18
  b = a + 2 * k;
19
  c = b + 2 * k;
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  e = y + 2 * k;
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  __asm__ volatile (""
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		    : "=m" (x[0]), "=m" (b[0]), "=m" (a[0]), "=m" (c[0])
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		    : "m" (y[0]), "m" (y[k * 2]), "m" (x[0]), "m" (a[0])
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		    : "memory");
25
  for (;;)
26
    {
27
      __asm__ volatile (""
28
			:
29
			: "m" (y[2]), "m" (d[2]), "m" (e[2]), "m" (z[2])
30
                        : "memory");
31
      if (!--k)
32
	break;
33
    }
34
  __asm__ volatile (""
35
		    : "=m" (x[2]), "=m" (x[10]), "=m" (x[6]), "=m" (x[14])
36
		    : "m" (y[2]), "m" (y[6]), "m" (x[2]), "m" (x[6]), "m" (s1)
37
		    : "memory");
38
}
39
40
void
41
bar (float *a)
42
{
43
  foo (4, a, a + 16, s2, s3);
44
  foo (8, a, a + 32, s4, s5);
45
}
46
47
void
48
baz (void)
49
{
50
  bar (s0);
51
}
(-)gcc/testsuite/gcc.target/i386/pr39543-3.c.jj (+42 lines)
Line 0 Link Here
1
/* PR rtl-optimization/39543 */
2
/* { dg-do compile } */
3
/* { dg-options "-O2" } */
4
5
int s[128];
6
7
void
8
f1 (void)
9
{
10
  int i;
11
  asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17"
12
		: "=r" (i)
13
		: "m" (s[0]), "m" (s[2]), "m" (s[4]), "m" (s[6]), "m" (s[8]),
14
		  "m" (s[10]), "m" (s[12]), "m" (s[14]), "m" (s[16]), "m" (s[18]),
15
		  "m" (s[20]), "m" (s[22]), "m" (s[24]), "m" (s[26]), "m" (s[28]),
16
		  "m" (s[30]), "m" (s[32]));
17
  asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17"
18
		: "=r" (i)
19
		: "m" (s[0]), "m" (s[2]), "m" (s[4]), "m" (s[6]), "m" (s[8]),
20
		  "m" (s[10]), "m" (s[12]), "m" (s[14]), "m" (s[16]), "m" (s[18]),
21
		  "m" (s[20]), "m" (s[22]), "m" (s[24]), "m" (s[26]), "m" (s[28]),
22
		  "m" (s[30]), "m" (s[32]));
23
}
24
25
void
26
f2 (int *q)
27
{
28
  int i;
29
  int *p = q + 32;
30
  asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17"
31
		: "=r" (i)
32
		: "m" (p[0]), "m" (p[2]), "m" (p[4]), "m" (p[6]), "m" (p[8]),
33
		  "m" (p[10]), "m" (p[12]), "m" (p[14]), "m" (p[16]), "m" (p[18]),
34
		  "m" (p[20]), "m" (p[22]), "m" (p[24]), "m" (p[26]), "m" (p[28]),
35
		  "m" (p[30]), "m" (p[32]));
36
  asm volatile ("# %0 %1 %2 %3 %4 %5 %6 %7 %8 %9 %10 %11 %12 %13 %14 %15 %16 %17"
37
		: "=r" (i)
38
		: "m" (p[0]), "m" (p[2]), "m" (p[4]), "m" (p[6]), "m" (p[8]),
39
		  "m" (p[10]), "m" (p[12]), "m" (p[14]), "m" (p[16]), "m" (p[18]),
40
		  "m" (p[20]), "m" (p[22]), "m" (p[24]), "m" (p[26]), "m" (p[28]),
41
		  "m" (p[30]), "m" (p[32]));
42
}

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