Created attachment 51490 [details] testcase, compile with nvptx offloading enabled with: gfortran -fopenmp -O1 That's with several OvO Fortran testcases, the smallest is: https://github.com/TApplencourt/OvO/blob/master/test_src/fortran/hierarchical_parallelism/reduction_add-double_complex/target_simd.F90 The testcase (also attached) fails with: gfortran -fopenmp example.f90 -O1 with: during RTL pass: expand example.f90: In function 'MAIN__._omp_fn.0': example.f90:23:32: internal compiler error: in expand_insn, at optabs.c:7947 23 | counter_N0 = counter_N0 + 1. | ^ 0xb21933 expand_insn(insn_code, unsigned int, expand_operand*) /net/build5-trusty-cs.sje.mentorg.com/scratch/tburnus/openacc.x86_64-linux-gnu-openacc-mainline/src/gcc-mainline/gcc/optabs.c:7947 0x9761ad expand_GOMP_SIMT_XCHG_BFLY /net/build5-trusty-cs.sje.mentorg.com/scratch/tburnus/openacc.x86_64-linux-gnu-openacc-mainline/src/gcc-mainline/gcc/internal-fn.c:375 0x700897 expand_call_stmt Namely: expand_insn (icode=CODE_FOR_omp_simt_xchg_bfly, nops=nops@entry=3, ops=ops@entry=0x7fffffffda80) fails at: 7946 if (!maybe_expand_insn (icode, nops, ops)) 7947 gcc_unreachable (); (gdb) p *ops $4 = {type = EXPAND_OUTPUT, unsigned_p = 0, target = 0, unused = 0, mode = E_DCmode, value = 0x7ffff73fcc78, int_value = {<poly_int_pod<1u, long>> = {coeffs = {0}}, <No data fields>}}
Created attachment 52524 [details] Tentative patch
The master branch has been updated by Tom de Vries <vries@gcc.gnu.org>: https://gcc.gnu.org/g:c2e0d0c1cfb4bf29daed189b39885841ee201a65 commit r12-7425-gc2e0d0c1cfb4bf29daed189b39885841ee201a65 Author: Tom de Vries <tdevries@suse.de> Date: Mon Feb 28 16:06:54 2022 +0100 [nvptx] Handle DCmode in define_expand "omp_simt_xchg_{bfly,idx}" For a test-case doing an openmp target simd reduction on a complex double: ... DOUBLE COMPLEX :: counter_N0 ... !$OMP TARGET SIMD reduction(+: counter_N0) ... we run into: ... during RTL pass: expand b.f90: In function âMAIN__._omp_fn.0â: b.f90:23:32: internal compiler error: in expand_insn, at optabs.cc:8029 23 | counter_N0 = counter_N0 + 1. | ^ 0x10f1cd3 expand_insn(insn_code, unsigned int, expand_operand*) gcc/optabs.cc:8029 0xeac435 expand_GOMP_SIMT_XCHG_BFLY gcc/internal-fn.cc:375 ... Fix this by handling DCmode and CDImode in define_expand "omp_simt_xchg_{bfly,idx}". Tested on x86_64 with nvptx accelerator. gcc/ChangeLog: 2022-02-28 Tom de Vries <tdevries@suse.de> PR target/102429 * config/nvptx/nvptx.cc (nvptx_gen_shuffle): Handle DCmode and CDImode. * config/nvptx/nvptx.md (define_predicate "nvptx_register_or_complex_di_df_register_operand"): New predicate. (define_expand "omp_simt_xchg_bfly", define_expand "omp_simt_xchg_idx"): Use nvptx_register_or_complex_di_df_register_operand.
Fixed by '[nvptx] Handle DCmode in define_expand "omp_simt_xchg_{bfly,idx}"'.