This page contains information on GCC's implementation of the OpenACC specification and related functionality.
OpenACC is intended for programming accelerator devices such as GPUs, including code offloading to these devices.
Support for OpenACC in GCC is an experimental feature, incomplete, and subject to change in future versions of GCC.
For discussing this project, please use the standard GCC resources (mailing lists, Bugzilla, and so on). It's helpful to put a [OpenACC] tag into your email's Subject line, and set the openacc keyword in any Bugzilla issues filed.
GCC 5 includes a preliminary implementation of the OpenACC 2.0a specification.
The execution model currently only allows for one gang, one worker, and a number of vectors. These vectors will all execute in "vector-redundant" mode. This means that inside a parallel construct, offloaded code outside of any loop construct will be executed by all vectors, not just a single vector. The reduction clause is not yet supported with the parallel construct.
The kernels construct so far is supported only in a simplistic way: the code will be offloaded, but execute with just one gang, one worker, one vector. No directives are currently supported inside kernels constructs. Reductions are not yet supported inside kernels constructs.
The atomic, cache, declare, host_data, and routine directives are not yet supported. The default(none), device_type, firstprivate, and private clauses are not yet supported. A parallel construct's implicit data attributes for scalar data types will be treated as present_or_copy instead of firstprivate. Only the collapse clause is currently supported for loop constructs, and there is incomplete support for the reduction clause.
Combined directives (kernels loop, parallel loop) are not yet supported; use kernels alone, or parallel followed by loop, instead.
Nested parallelism (cf. CUDA dynamic parallelism) is not yet supported.
Usage of OpenACC constructs inside multithreaded contexts (such as created by OpenMP, or pthread programming) is not yet supported.
Work in Progress
Current development continues on gomp-4_0-branch. Please add a [gomp4] tag to any patches posted for inclusion in that branch.
The implementation status is the same as with GCC 5, with the following changes:
Initial support for OpenACC kernels, but still in early stages of development:
- Code will be offloaded, but executes with just one gang, one worker, and a number of vectors.
- (Each loop nest in a kernels region can be mapped onto a different parallelism dimension (worker, gang, vector) with a certain (optimal) parallelization factor. At the moment, we just support mapping a non-nested loop onto vector parallelism, with the parallelization factor indicated by a command-line switch. A heuristic to do an appropriate mapping should be done using loop analysis.)
- No directives are currently supported inside kernels constructs.
- (The OpenACC loop pragma has as side-effect that the subsequent loop is not expanded into basic control flow during gimplify/normal lowering, but during omp_expand. In SSA and loop analysis, we cannot handle the non-lowered loop, so we'll have to expand it. It remains to be seen whether that is the same expansion as omp_expand does currently does. The OpenACC loop pragma needs to be kept in the representation, f.i. as last instruction in the loop pre-header. Then we need to make sure it doesn't act as an optimization barrier, and lastly we need to implement the decisions communicated as clauses of the loop pragma.)
- Reductions are not yet supported inside kernels constructs.
- (What is working at the moment is the recognition in pass_parallelize_loop of a reduction loop in a kernels region. The difficulty is in the order of recognizing the reduction loop (in pass_parallelize_loop) after the code generation for the reduction loop (in pass_lower_omp), which has been discussed quite a bit. The current plan is to speculate during code generation that a variable is a reduction variable, generate part of the code for it, and if a reduction loop is indeed recognized later-on, do the rest of the code generation.)
A single, non-nested, bounded loop in a kernels region can be parallelized onto vectors by using: -fopenacc -O2 -ftree-parallelize-loops=[number of vectors].
- Nested loops are not supported/parallelized.
- (The standard pass_parallelize_loops also transforms nested loops, so this should be possible, but since code generation is different for oacc, we're likely to run into a bunch of issues.)
- Only one loop per kernels region is handled.
- (It's possible to have two or more subsequent loops, as well as sequential code inbetween loop in a kernels region, but that is not yet supported.)
- No loops with unknown loop bound.
- (A loop in a kernels region can have an (at compile time) unknown loop bound, which is currently not supported. This type of loop generates a pattern where the kernels region starts with a basic block with two successors, the loop and the exit. This pattern is not supported by standard pass_parallelize_loops: in that case the loop entry test is generated *outside* the region that is going to be split off.)
- No true vectorization.
- (A dependent but vectorizable loop can be vectorized (mapped on the vector dimension), but that is currently not supported. At the moment, we just use pass_parallelize_loops, which classifies loops as either dependent or independent.)
- Nested loops are not supported/parallelized.
For ACC_DEVICE_TYPE, there are three options: nvidia, host_nonshm, host. The last one, host, means single-threaded host-fallback execution, in a shared-memory mode. In contrast, host_nonshm means execution on the host, still single-threaded, but with an emulated non-shared memory. The idea is that even if no accelerator is currently available, you can still use that one to test your data directives.
GOMP_DEBUG=1 can be set in the environment to enable some debugging output during execution. This is planned to be improved, to be better consumed by users. Currently it logs data management and kernel launches, and if a nvptx device type is active, also includes a dump of the offloaded PTX code.