3.17.5 CRIS Options
These options are defined specifically for the CRIS ports.
- Generate code for the specified architecture. The choices for
architecture-type are `v3', `v8' and `v10' for
respectively ETRAX 4, ETRAX 100, and ETRAX 100 LX.
Default is `v0' except for cris-axis-linux-gnu, where the default is
- Tune to architecture-type everything applicable about the generated
code, except for the ABI and the set of available instructions. The
choices for architecture-type are the same as for
- Warn when the stack frame of a function exceeds n bytes.
- Only available with the `cris-axis-aout' target. Arranges for
indications in the program to the kernel loader that the stack of the
program should be set to n bytes.
- The options -metrax4 and -metrax100 are synonyms for
-march=v3 and -march=v8 respectively.
- Work around a bug in the
mulu instructions for CPU
models where it applies. This option is active by default.
- Enable CRIS-specific verbose debug-related information in the assembly
code. This option also has the effect to turn off the `#NO_APP'
formatted-code indicator to the assembler at the beginning of the
- Do not use condition-code results from previous instruction; always emit
compare and test instructions before use of condition codes.
- Do not emit instructions with side-effects in addressing modes other than
- These options (no-options) arranges (eliminate arrangements) for the
stack-frame, individual data and constants to be aligned for the maximum
single data access size for the chosen CPU model. The default is to
arrange for 32-bit alignment. ABI details such as structure layout are
not affected by these options.
- Similar to the stack- data- and const-align options above, these options
arrange for stack-frame, writable data and constants to all be 32-bit,
16-bit or 8-bit aligned. The default is 32-bit alignment.
- With -mno-prologue-epilogue, the normal function prologue and
epilogue that sets up the stack-frame are omitted and no return
instructions or return sequences are generated in the code. Use this
option only together with visual inspection of the compiled code: no
warnings or errors are generated when call-saved registers must be saved,
or storage for local variable needs to be allocated.
- With -fpic and -fPIC, don't generate (do generate)
instruction sequences that load addresses for functions from the PLT part
of the GOT rather than (traditional on other architectures) calls to the
PLT. The default is -mgotplt.
- Legacy no-op option only recognized with the cris-axis-aout target.
- Legacy no-op option only recognized with the cris-axis-elf and
- Only recognized with the cris-axis-aout target, where it selects a
GNU/linux-like multilib, include files and instruction set for
- Legacy no-op option only recognized with the cris-axis-linux-gnu target.
- This option, recognized for the cris-axis-aout and cris-axis-elf arranges
to link with input-output functions from a simulator library. Code,
initialized data and zero-initialized data are allocated consecutively.
- Like -sim, but pass linker options to locate initialized data at
0x40000000 and zero-initialized data at 0x80000000.