Node: M88K Options, Next: , Previous: M32R/D Options, Up: Submodel Options

M88K Options

These -m options are defined for Motorola 88k architectures:

Generate code that works well on both the m88100 and the m88110.
Generate code that works best for the m88100, but that also runs on the m88110.
Generate code that works best for the m88110, and may not run on the m88100.
Obsolete option to be removed from the next revision. Use -fPIC.
Include an ident directive in the assembler output recording the source file name, compiler name and version, timestamp, and compilation flags used.
In assembler output, emit symbol names without adding an underscore character at the beginning of each name. The default is to use an underscore as prefix on each name.
Include (or omit) additional debugging information (about registers used in each stack frame) as specified in the 88open Object Compatibility Standard, "OCS". This extra information allows debugging of code that has had the frame pointer eliminated. The default for SVr4 and Delta 88 SVr3.2 is to include this information; other 88k configurations omit this information by default.
When emitting COFF debugging information for automatic variables and parameters stored on the stack, use the offset from the canonical frame address, which is the stack pointer (register 31) on entry to the function. The SVr4 and Delta88 SVr3.2, and BCS configurations use -mocs-frame-position; other 88k configurations have the default -mno-ocs-frame-position.
When emitting COFF debugging information for automatic variables and parameters stored on the stack, use the offset from the frame pointer register (register 30). When this option is in effect, the frame pointer is not eliminated when debugging information is selected by the -g switch.
Save space by reorganizing the stack frame. This option generates code that does not agree with the 88open specifications, but uses less memory.
Do not reorganize the stack frame to save space. This is the default. The generated conforms to the specification, but uses more memory.
Generate smaller data references by making them relative to r0, which allows loading a value using a single instruction (rather than the usual two). You control which data references are affected by specifying num with this option. For example, if you specify -mshort-data-512, then the data references affected are those involving displacements of less than 512 bytes. -mshort-data-num is not effective for num greater than 64k.
Do, or don't, generate code to guarantee sequential consistency of volatile memory references. By default, consistency is guaranteed.

The order of memory references made by the MC88110 processor does not always match the order of the instructions requesting those references. In particular, a load instruction may execute before a preceding store instruction. Such reordering violates sequential consistency of volatile memory references, when there are multiple processors. When consistency must be guaranteed, GCC generates special instructions, as needed, to force execution in the proper order.

The MC88100 processor does not reorder memory references and so always provides sequential consistency. However, by default, GCC generates the special instructions to guarantee consistency even when you use -m88100, so that the code may be run on an MC88110 processor. If you intend to run your code only on the MC88100 processor, you may use -mno-serialize-volatile.

The extra code generated to guarantee consistency may affect the performance of your application. If you know that you can safely forgo this guarantee, you may use -mno-serialize-volatile.

Turn on (-msvr4) or off (-msvr3) compiler extensions related to System V release 4 (SVr4). This controls the following:
  1. Which variant of the assembler syntax to emit.
  2. -msvr4 makes the C preprocessor recognize #pragma weak that is used on System V release 4.
  3. -msvr4 makes GCC issue additional declaration directives used in SVr4.

-msvr4 is the default for the m88k-motorola-sysv4 configuration. -msvr3 is the default for all other m88k configurations.

This option is obsolete, and is ignored.
Do, or don't, generate code to guarantee that integer division by zero will be detected. By default, detection is guaranteed.

Some models of the MC88100 processor fail to trap upon integer division by zero under certain conditions. By default, when compiling code that might be run on such a processor, GCC generates code that explicitly checks for zero-valued divisors and traps with exception number 503 when one is detected. Use of -mno-check-zero-division suppresses such checking for code generated to run on an MC88100 processor.

GCC assumes that the MC88110 processor correctly detects all instances of integer division by zero. When -m88110 is specified, no explicit checks for zero-valued divisors are generated, and both -mcheck-zero-division and -mno-check-zero-division are ignored.

Use the div instruction for signed integer division on the MC88100 processor. By default, the div instruction is not used.

On the MC88100 processor the signed integer division instruction div) traps to the operating system on a negative operand. The operating system transparently completes the operation, but at a large cost in execution time. By default, when compiling code that might be run on an MC88100 processor, GCC emulates signed integer division using the unsigned integer division instruction divu), thereby avoiding the large penalty of a trap to the operating system. Such emulation has its own, smaller, execution cost in both time and space. To the extent that your code's important signed integer division operations are performed on two nonnegative operands, it may be desirable to use the div instruction directly.

On the MC88110 processor the div instruction (also known as the divs instruction) processes negative operands without trapping to the operating system. When -m88110 is specified, -muse-div-instruction is ignored, and the div instruction is used for signed integer division.

Note that the result of dividing INT_MIN by -1 is undefined. In particular, the behavior of such a division with and without -muse-div-instruction may differ.

Include code to detect bit-shifts of more than 31 bits; respectively, trap such shifts or emit code to handle them properly. By default GCC makes no special provision for large bit shifts.
Warn when a function passes a struct as an argument or result. Structure-passing conventions have changed during the evolution of the C language, and are often the source of portability problems. By default, GCC issues no such warning.