On many machines, the numbered registers are not all equivalent. For example, certain registers may not be allowed for indexed addressing; certain registers may not be allowed in some instructions. These machine restrictions are described to the compiler using register classes.
You define a number of register classes, giving each one a name and saying which of the registers belong to it. Then you can specify register classes that are allowed as operands to particular instruction patterns.
In general, each register will belong to several classes. In fact, one
class must be named
ALL_REGS and contain all the registers. Another
class must be named
NO_REGS and contain no registers. Often the
union of two classes will be another class; however, this is not required.
One of the classes must be named
GENERAL_REGS. There is nothing
terribly special about the name, but the operand constraint letters
g specify this class. If
the same as
ALL_REGS, just define it as a macro which expands
Order the classes so that if class x is contained in class y then x has a lower class number than y.
The way classes other than
GENERAL_REGS are specified in operand
constraints is through machine-dependent operand constraint letters.
You can define such letters to correspond to various classes, then use
them in operand constraints.
You should define a class for the union of two classes whenever some
instruction allows both classes. For example, if an instruction allows
either a floating point (coprocessor) register or a general register for a
certain operand, you should define a class
which includes both of them. Otherwise you will get suboptimal code.
You must also specify certain redundant information about the register classes: for each class, which classes contain it and which ones are contained in it; for each pair of classes, the largest class contained in their union.
When a value occupying several consecutive registers is expected in a
certain class, all the registers used must belong to that class.
Therefore, register classes cannot be used to enforce a requirement for
a register pair to start with an even-numbered register. The way to
specify this requirement is with
Register classes used for input-operands of bitwise-and or shift
instructions have a special requirement: each such class must have, for
each fixed-point machine mode, a subclass whose registers can transfer that
mode to or from memory. For example, on some machines, the operations for
single-byte values (
QImode) are limited to certain registers. When
this is so, each register class that is used in a bitwise-and or shift
instruction must have a subclass consisting of registers from which
single-byte values can be loaded or stored. This is so that
PREFERRED_RELOAD_CLASS can always have a possible value to return.
NO_REGSmust be first.
ALL_REGSmust be the last register class, followed by one more enumeral value,
LIM_REG_CLASSES, which is not a register class but rather tells how many classes there are.
Each register class has a number, which is the value of casting
the class name to type
int. The number serves as an index
in many of the tables described below.
#define N_REG_CLASSES (int) LIM_REG_CLASSES
& (1 <<r
When the machine has more than 32 registers, an integer does not suffice.
Then the integers are replaced by sub-initializers, braced groupings containing
several integers. Each sub-initializer must be suitable as an initializer
for the type
HARD_REG_SET which is defined in
In this situation, the first integer in each sub-initializer corresponds to
registers 0 through 31, the second integer to registers 32 through 63, and
BASE_REG_CLASSmacro which allows the selection of a base register in a mode depenedent manner. If mode is VOIDmode then it should return the same value as
NO_REGS. The register letter
r, corresponding to class
GENERAL_REGS, will not be passed to this macro; you do not need to handle it.
REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the memory reference in mode. You should define this macro if the mode of the memory reference affects whether a register may be used as a base register. If you define this macro, the compiler will use it instead of
The difference between an index register and a base register is that
the index register may be scaled. If an address involves the sum of
two registers, neither one of them scaled, then either one may be
labeled the "base" and the other the "index"; but whichever
labeling is used must fit the machine's constraints of which registers
may serve in each capacity. The compiler will try both labelings,
looking for one that is valid, and will reload one or both registers
only if neither labeling works.
#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
Sometimes returning a more restrictive class makes better code. For
example, on the 68000, when x is an integer constant that is in range
moveq instruction, the value of this macro is always
DATA_REGS as long as class includes the data registers.
Requiring a data register guarantees that a
moveq will be used.
If x is a
const_double, by returning
you can force x into a memory constant. This is useful on
certain machines where immediate floating values cannot be loaded into
certain kinds of registers.
PREFERRED_RELOAD_CLASS, but for output reloads instead of input reloads. If you don't define this macro, the default is to use class, unchanged.
PREFERRED_RELOAD_CLASS, this macro should be used when
there are certain modes that simply can't go in certain reload classes.
The value is a register class; perhaps class, or perhaps another, smaller class.
Don't define this macro unless the target machine has limitations which
require the macro to do something nontrivial.
MQregister, which on most machines, can only be copied to or from general registers, but not memory. Some machines allow copying all registers to and from memory, but require a scratch register for stores to some memory locations (e.g., those with symbolic address on the RT, and those with certain symbolic address on the Sparc when compiling PIC). In some cases, both an intermediate and a scratch register are required.
You should define these macros to indicate to the reload phase that it may
need to allocate at least one register for a reload in addition to the
register to contain the data. Specifically, if copying x to a
register class in mode requires an intermediate register,
you should define
SECONDARY_INPUT_RELOAD_CLASS to return the
largest register class all of whose registers can be used as
intermediate registers or scratch registers.
If copying a register class in mode to x requires an
intermediate or scratch register,
should be defined to return the largest register class required. If the
requirements for input and output reloads are the same, the macro
SECONDARY_RELOAD_CLASS should be used instead of defining both
The values returned by these macros are often
NO_REGS if no spare register is needed; i.e., if x
can be directly copied to or from a register of class in
mode without requiring a scratch register. Do not define this
macro if it would always return
If a scratch register is required (either with or without an
intermediate register), you should define patterns for
, as required
(see Standard Names. These patterns, which will normally be
implemented with a
define_expand, should be similar to the
patterns, except that operand 2 is the scratch
Define constraints for the reload register and scratch register that contain a single register class. If the original reload register (whose class is class) can meet the constraint given in the pattern, the value returned by these macros is used for the class of the scratch register. Otherwise, two additional reload registers are required. Their classes are obtained from the constraints in the insn pattern.
x might be a pseudo-register or a
subreg of a
pseudo-register, which could either be in a hard register or in memory.
true_regnum to find out; it will return -1 if the pseudo is
in memory and the hard register number if it is in a register.
These macros should not be used in the case where a particular class of
registers can only be copied to memory and not to another class of
registers. In that case, secondary reload registers are not needed and
would not be helpful. Instead, a stack location must be used to perform
the copy and the
pattern should use memory as an
intermediate storage. This case often occurs between floating-point and
Do not define this macro if its value would always be zero.
SECONDARY_MEMORY_NEEDEDis defined, the compiler allocates a stack slot for a memory location needed for register copies. If this macro is defined, the compiler instead uses the memory location defined by this macro.
Do not define this macro if you do not define
BITS_PER_WORDbits and performs the store and load operations in a mode that many bits wide and whose class is the same as that of mode.
This is right thing to do on most machines because it ensures that all bits of the register are copied and prevents accesses to the registers in a narrower mode, which some machines prohibit for floating-point registers.
However, this default behavior is not correct on some machines, such as
the DEC Alpha, that store short integers in floating-point registers
differently than in integer registers. On those machines, the default
widening will not work correctly and you must define this macro to
suppress that widening in some cases. See the file
Do not define this macro if you do not define
SECONDARY_MEMORY_NEEDED or if widening mode to a mode that
BITS_PER_WORD bits wide is correct for your machine.
SMALL_REGISTER_CLASSES to be an expression with a nonzero
value on these machines. When this macro has a nonzero value, the
compiler will try to minimize the lifetime of hard registers.
It is always safe to define this macro with a nonzero value, but if you
unnecessarily define it, you will reduce the amount of optimizations
that can be performed in some cases. If you do not define this macro
with a nonzero value when it is required, the compiler will run out of
spill registers and print a fatal error message. For most machines, you
should not define this macro at all.
The default value of this macro returns 1 if class has exactly one
register and zero otherwise. On most machines, this default should be
used. Only define this macro to some other expression if pseudos
local-alloc.c end up in memory because their hard
registers were needed for spill registers. If this macro returns nonzero
for those classes, those pseudos will only be allocated by
global.c, which knows how to reallocate the pseudo to another
register. If there would not be another register available for
reallocation, you should not change the definition of this macro since
the only effect of such a definition would be to slow down register
This is closely related to the macro
HARD_REGNO_NREGS. In fact,
the value of the macro
should be the maximum value of
) for all regno values in the class class.
This macro helps control the handling of multiple-word values
in the reload pass.
CLASS_CANNOT_CHANGE_MODE, the requested mode punning is invalid.
For the example, loading 32-bit integer or floating-point objects into
floating-point registers on the Alpha extends them to 64 bits.
Therefore loading a 64-bit object and then storing it as a 32-bit object
does not store the low-order 32 bits, as would be the case for a normal
mode changes to same-size modes.
Compare this to IA-64, which extends floating-point values to 82 bits,
and stores 64-bit integers in a different format than 64-bit doubles.
CLASS_CANNOT_CHANGE_MODE_P is always true.
Three other special macros describe which operands fit which constraint letters.
P) that specify particular ranges of integer values. If c is one of those letters, the expression should check that value, an integer, is in the appropriate range and return 1 if so, 0 otherwise. If c is not one of those letters, the value should be 0 regardless of value.
If c is one of those letters, the expression should check that
value, an RTX of code
const_double, is in the appropriate
range and return 1 if so, 0 otherwise. If c is not one of those
letters, the value should be 0 regardless of value.
const_double is used for all floating-point constants and for
DImode fixed-point constants. A given letter can accept either
or both kinds of values. It can use
GET_MODE to distinguish
between these kinds.
REG_CLASS_FROM_LETTERmay be used. Normally this macro will not be defined.
If it is required for a particular target machine, it should return 1 if value corresponds to the operand type represented by the constraint letter c. If c is not defined as an extra constraint, the value returned should be 0 regardless of value.
For example, on the ROMP, load instructions cannot have their output
in r0 if the memory reference contains a symbolic address. Constraint
Q is defined as representing a memory address that does
not contain a symbolic address. An alternative is specified with
Q constraint on the input and
r on the output. The next
m on the input and a register class that
does not include r0 on the output.