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[committed] Fix asm in config/cpu/hppa/atomicity.h to work with HP as


The HP assembler generates an error when it sees a "stw,ma" instruction
with a zero increment.  So, libstdc++ doesn't build.

I used the "stw,ma" instruction as it generates the binary code for
a PA 2.0 ordered store using instruction PA 1.x semantics.  Testing had
indicated that the instruction executed correctly on both PA 1.1 and 2.0
hardware.

It had seemed better to use a store that was always guaranteed to
have strong ordering semantics as defined in the PA 2.0 architecture
document.  However, I've been told that all PA-RISC processors are
strongly ordered and using a normal store is ok.  I have some doubt
whether this is actually true for V-class or Superdome, but these
machines aren't available for testing.  So, I've decided to just
use a normal store to reset the locks used in __exchange_and_add
and __atomic_add.

Tested on hppa2.0w-hp-hpux11.11 and hppa64-hp-hpux11.11 with no
regressions.  Committed to 4.0, 4.1, 4.2 and trunk.

With this change, c++ and libstdc++-v3 now build successfully using
the 4.0 branch and HP tools.  So, I'm closing PR target/8512.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc-cnrc.gc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)

2007-01-13  John David Anglin  <dave.anglin@nrc-cnrc.gc>

	* config/cpu/hppa/atomicity.h (__exchange_and_add): Don't use ordered
	store.
	(__atomic_add): Likewise.

Index: config/cpu/hppa/atomicity.h
===================================================================
--- config/cpu/hppa/atomicity.h	(revision 120704)
+++ config/cpu/hppa/atomicity.h	(working copy)
@@ -66,8 +66,7 @@
     
     result = *__mem;
     *__mem = result + __val;
-    /* Reset lock with PA 2.0 "ordered" store.  */
-    __asm__ __volatile__ ("stw,ma %1,0(%0)"
+    __asm__ __volatile__ ("stw %1,0(%0)"
 			  : : "r" (&lock), "r" (tmp) : "memory");
     return result;
   }
@@ -90,8 +89,7 @@
 			  : "memory");
     
     *__mem += __val;
-    /* Reset lock with PA 2.0 "ordered" store.  */
-    __asm__ __volatile__ ("stw,ma %1,0(%0)"
+    __asm__ __volatile__ ("stw %1,0(%0)"
 			  : : "r" (&lock), "r" (tmp) : "memory");
   }
 


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