On Apr 1, 2005 7:10 PM, Peter Dimov <pdimov@mmltd.net> wrote:
Alexander Terekhov wrote:
or powerpc:
Well, see
http://sourceware.org/cgi-bin/cvsweb.cgi/libc/sysdeps/powerpc/bits/atomic.h?cvsroot=glibc
I see no "release" barriers in exchange_and_add or the decrements,
only an "acquire if zero" in decrement_if_positive.
I meant __arch_compare_and_exchange_val_32_acq() and
__arch_compare_and_exchange_val_32_rel() which illustrates placement
and barrier instruction for acquire and release respectively. Fully-fenced
stuff needs both.