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Interpreter/libffi ARM Porting
- From: "Craig A. Vanderborgh" <craigv at voxware dot com>
- To: java at gcc dot gnu dot org
- Date: Wed, 16 Jun 2004 11:40:21 -0400
- Subject: Interpreter/libffi ARM Porting
- Organization: voxware incorporated
Hello,
I am working on a port to ARM/Xscale of the gcj interpreter. We have
written the required "ffi closures" for ARM and we have the intepreter
working - at least partially.
We are having trouble with interpreter exception handling though. And I
am wondering if our problems are because something is missing in our
"sysv.S" for our ARM implementation.
The x86 version of sysv.S has this block of code at the end of
src/x86/sysv.S:
.section .eh_frame,"aw",@progbits
__FRAME_BEGIN__:
.4byte .LLCIE1
.LSCIE1:
.4byte 0x0
.byte 0x1
.byte 0x0
.byte 0x1
.byte 0x7c
.byte 0x8
.byte 0xc
.byte 0x4
.byte 0x4
.byte 0x88
.byte 0x1
.align 4
.LECIE1:
.set .LLCIE1,.LECIE1-.LSCIE1
.4byte .LLFDE1
.LSFDE1:
.4byte .LSFDE1-__FRAME_BEGIN__
.4byte .LFB1
.4byte .LFE1-.LFB1
.byte 0x4
.4byte .LCFI0-.LFB1
.byte 0xe
.byte 0x8
.byte 0x85
.byte 0x2
.byte 0x4
.4byte .LCFI1-.LCFI0
.byte 0xd
.byte 0x5
.align 4
.LEFDE1:
.set .LLFDE1,.LEFDE1-.LSFDE1
What does this do? Is it related to exception handling in some way? Do
we need to have the equivalent thing in our ARM implementation?
Please advise.
Thanks in advance,
craig vanderborgh
voxware incorporated