Re: PATCH: libffi: improvements for MIPS o32.

[David Daney <ddaney at avtrex dot com>]

Casey Marshall wrote:
> Hi.
> 
> The attached patch expands on my previous patches to libffi for the
> MIPS o32 ABI. It adds closure and exception unwinding support for this
> architecture.
> 
> I have some questions about this, however:
> 
>   * It's been indicated that the ABI is different for software-only
>     floating point architectures. I don't know how to handle this,
>     though. Is this something an #ifdef can handle?

I was thinking something like this (untested):

[daney@dl mips]$ diff -u ffitarget.h ~/ffitarget.h
--- ffitarget.h 2003-10-22 08:32:13.000000000 -0700
+++ /home/daney/ffitarget.h     2004-06-30 14:02:40.000000000 -0700
@@ -37,6 +37,9 @@
 #    define FFI_MIPS_N32
 #  else
 #    if _MIPS_SIM==_ABIO32 && defined(_ABIO32)
+#      ifdef __mips_soft_float
+#        define FFI_MIPS_O32_SF
+#      endif
 #      define FFI_MIPS_O32
 #    else
 -- this is an unsupported platform --
@@ -136,16 +139,21 @@
 typedef enum ffi_abi {
   FFI_FIRST_ABI = 0,
   FFI_O32,
+  FFI_O32_SF,
   FFI_N32,
   FFI_N64,

 #ifdef FFI_MIPS_O32
+#  ifdef FFI_MIPS_O32_SF
+  FFI_DEFAULT_ABI = FFI_O32_SF,
+#  else
   FFI_DEFAULT_ABI = FFI_O32,
+#  endif
 #else
   FFI_DEFAULT_ABI = FFI_N32,
 #endif

-  FFI_LAST_ABI = FFI_DEFAULT_ABI + 1
+  FFI_LAST_ABI = FFI_DEFAULT_ABI + 1 /* FIXME: What is this all about? */
 } ffi_abi;

 #define FFI_EXTRA_CIF_FIELDS unsigned rstruct_flag

Now you have two ABIs for O32.  FFI_O32, and FFI_O32_SF  The SF version
does the "right thing" (ie not pass stuff around in the FPU registers).

> 
>   * I'm using the `cacheflush' system call to flush the I-cache, but
>     have been warned by the man page that that function is only
>     available for MIPS. I don't know if this means "MIPS Linux", or if
>     this system call is available on other OSes.
> 
>     I also see that on Linux this system call is totally inefficient
>     (it flushes the entire cache, not just the region specified).

I think that is all you can do for portable operation.  The mips32r2 ISA
has the synci instruction, but many o32 based systems are not mips32r2,
so it would not be portable.

If you really wanted to hack it up, you could test for the ability to
execute synci and call cacheflush if you cannot use it.  Install a
handler for SIGILL, and execute synci.  If you get SIGILL you have to
use cacheflush.  Then uninstall the handler, and proceed.


> 
>   * The libffi testsuite in mainline seems broken for my cross-compile
>     setup. I have run the old `ffitest.c' test file (with the long
>     long test enabled) and all tests pass.
> 
>   * gij isn't created when I make my cross gcc. I built and installed
>     it on the target by hand, but don't know if tests that use it get
>     missed.

You should probably also hack up libjava/configure.host so that
libgcj_interpreter=yes for mips.

> 
> Should I post my test results to gcc-testresults? Even though it is a
> patched version? At any rate, I get the following results for libjava:
> 
> # of expected passes            2711
> # of unexpected failures        24
> # of expected failures          14
> # of untested testcases         34
> 
> Comments greatly appreciated.
> 
What are the failures?

Keep up the good work.

David Daney.