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Re: RFA: [PATCH]: MIPS enhancements to libgcj...

From: David Daney <ddaney at avtrex dot com>
To: Eric Christopher <echristo at redhat dot com>
Cc: Jeff Sturm <jsturm at one-point dot com>, java-patches at gcc dot gnu dot org
Date: Tue, 21 Oct 2003 13:45:04 -0700
Subject: Re: RFA: [PATCH]: MIPS enhancements to libgcj...
References: <Pine.LNX.4.44.0310211619320.733-100000@ops2.one-point.com> <3F959827.4060205@avtrex.com> <1066768665.2570.9.camel@ghostwheel.sfbay.redhat.com>

Eric Christopher wrote:

There are many different MIPS cpu cores and the manuals for each do say if "sync" is a valid instruction. I just didn't want to have to try to find and read them all and was hoping that someone would enlighten me.

It's not a valid instruction on R2000 and R3000 processors.

Thanks,

How do we know at configure time that the target supports "sync"?

A casual look a binutils source implies that ISA2 and above may support "sync".

Is that true? Again how do we know the target ISA at libgcj build time?

David Daney.

Follow-Ups:
- Re: RFA: [PATCH]: MIPS enhancements to libgcj...
  - From: Eric Christopher

References:
- Re: RFA: [PATCH]: MIPS enhancements to libgcj...
  - From: Jeff Sturm
- Re: RFA: [PATCH]: MIPS enhancements to libgcj...
  - From: David Daney
- Re: RFA: [PATCH]: MIPS enhancements to libgcj...
  - From: Eric Christopher

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