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Re: RISC-V ELF multilibs
- From: Sebastian Huber <sebastian dot huber at embedded-brains dot de>
- To: Jim Wilson <jimw at sifive dot com>, GCC <gcc at gcc dot gnu dot org>
- Cc: Palmer Dabbelt <palmer at dabbelt dot com>
- Date: Fri, 1 Jun 2018 08:16:22 +0200
- Subject: Re: RISC-V ELF multilibs
- References: <233244769.189066.1527339877501.JavaMail.zimbra@embedded-brains.de> <e4e6d066-5ef0-d421-ac32-29455907bc00@sifive.com>
On 29/05/18 20:02, Jim Wilson wrote:
Most variants include the C extension. Would it be possible to add
-march=rv32g and -march=rv64g variants?
The expectation is that most implementations will include the C
extension. It reduces code size, improves performance, and I think I
read somewhere that it takes only 400 gates to implement.
It isn't practical to try to support every possible combination of
architecture and ABI here, as there are too many possible
combinations. But if there is a major RISC-V target that is rv32g or
rv64g then we should consider it. You can of course define your own
set of multilibs.
I am not a hardware developer, but I heard that the C extension is not
easy to implement in out of order machines. For example:
https://www2.eecs.berkeley.edu/Pubs/TechRpts/2017/EECS-2017-157.html
--
Sebastian Huber, embedded brains GmbH
Address : Dornierstr. 4, D-82178 Puchheim, Germany
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