About global var reg optimization

[Aurelien Buhrig <aurelien dot buhrig dot gcc at gmail dot com>]

Hello !

I would like to use a fixed global register (here, as an applicative
stack pointer) and would like gcc (6.3 / private backend) to actually
optimize the following code using postinc/predec addressing mode on this
global fixed reg itself (a4 here) :

register int *ptr asm ("a4");
void  pushint (int a) {  *ptr++ = a; }

- The optimized tree looks like:
pushint (int a)
{
  int * ptr.0_2;
  int * _3;

  <bb 2>:
  ptr.0_2 = ptr;
  _3 = ptr.0_2 + 2;
  ptr = _3;
  *ptr.0_2 = a_5(D);
  return;
}

- And the RTL expand looks like:
(set (reg/v:HI 26 [ a ]) (reg:HI 0 r0 [ a ]))
(set (reg/f:SI 24 [ ptr.0_2 ]) (reg/v:SI 12 a4 [ ptr ]))
(set (reg/v:SI 12 a4 [ ptr ]) (plus:SI (reg/f:SI 24 [ ptr.0_2 ])
(const_int 2)))
(set (mem:HI (reg/f:SI 24 [ ptr.0_2 ])) (reg/v:HI 26 [ a ]))

Firstly, the global fixed reg (a4) is flagged volatile, but maybe it is
normal for a user var? May the volatile flag prevent the autoincdec pass
to use a4 as postinc reg?
Then, ptr is spilled into pseudo reg 24 which is used as base reg, which
seems to prevent the autoincdec pass to use a4.

Any idea how I could optimize such a code ?

Thank you in advance,
Cheers,
Aurélien