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Re: -mcx16 vs. not using CAS for atomic loads
On 01/24/2017 01:08 AM, Torvald Riegel wrote:
> Unless HW transactions are guaranteed to succeed for scenarios that are
> sufficient for the atomics, HTM won't help because we'd have to consider
> the worst-case, which would mean some non-HTM fallback.
We're talking about a 16 byte aligned load here -- one cacheline, probably 3-4
instructions. If an HTM cannot succeed with that, I'm happy to call it useless.
The only possible concern I see might be with simulators that force HTM
failure, for the purpose of forcibly testing fallback paths. I guess we'd have
to continue to fall back to the lock path for that case.