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Re: How to configure a bi-arch PowerPC GCC?


Hi,

On Thu, Jan 19, 2017 at 01:41:33PM +0100, Sebastian Huber wrote:
> conftest.c:16:1: error: unrecognizable insn:
>  }
>  ^
> (insn/f 22 21 23 2 (parallel [
>             (set (reg/f:DI 1 1)
>                 (plus:SI (reg/f:DI 1 1)
>                     (const_int 16 [0x10])))
>             (set (mem:BLK (reg/f:DI 1 1) [0  A8])
>                 (const_int 0 [0]))
>             (set (mem:BLK (reg/f:DI 1 1) [0  A8])
>                 (const_int 0 [0]))
>         ]) "conftest.c":16 -1
>      (expr_list:REG_CFA_DEF_CFA (reg/f:DI 1 1)
>         (nil)))

This is stack_restore_tie, which requires TARGET_32BIT.

It currently is only generated from rs6000_emit_stack_reset:

  /* This blockage is needed so that sched doesn't decide to move
     the sp change before the register restores.  */
  if (DEFAULT_ABI == ABI_V4
      || (TARGET_SPE_ABI
          && info->spe_64bit_regs_used != 0
          && info->first_gp_reg_save != 32))
    return emit_insn (gen_stack_restore_tie (updt_reg_rtx, frame_reg_rtx,
                                             GEN_INT (frame_off)));

so you seem to have 64-bit ABI_V4?  I wonder how well tested that is,
you are likely to run into more problems.  Either stack_restore_tie or
the above code will need a tweak.


Segher


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