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Successful bootstrap and install of gcc (GCC) 6.3.0 on mips64-unknown-linux-gnu


Hi,

Here's a report of a successful build and install of GCC:

$ gcc-6.3.0/config.guess
mips64-unknown-linux-gnu

$ newcompiler/bin/gcc -v
Using built-in specs.
COLLECT_GCC=newcompiler/bin/gcc
COLLECT_LTO_WRAPPER=/home/aaro/gcctest/newcompiler/libexec/gcc/mips-unknown-linux-gnu/6.3.0/lto-wrapper
Target: mips-unknown-linux-gnu
Configured with: ../gcc-6.3.0/configure --with-arch=octeon+ --with-abi=32 --enable-targets=all --with-float=soft --disable-nls --prefix=/home/aaro/gcctest/newcompiler --enable-languages=c,c++ --host=mips-unknown-linux-gnu --build=mips-unknown-linux-gnu --target=mips-unknown-linux-gnu --with-system-zlib --with-sysroot=/
Thread model: posix
gcc version 6.3.0 (GCC) 

-- Build environment ----------------------------------------------------------

host:	  edgerouter-pro
distro:	  los.git rootfs=ef31e1 native=ef31e1
kernel:	  Linux 4.9.0-octeon-los_ef31e1
binutils: GNU binutils 2.27
make:	  GNU Make 4.2.1
libc:	  GNU C Library (GNU libc) stable release version 2.24
zlib:	  1.2.8
mpfr:	  3.1.3
gmp:	  60000

-- Time consumed --------------------------------------------------------------

configure:	real	0m 10.72s
		user	0m 9.62s
		sys	0m 0.92s

bootstrap:	real	13h 30m 40s
		user	23h 37m 08s
		sys	1h 32m 52s

install:	real	9m 20.03s
		user	3m 9.25s
		sys	4m 51.87s

-- Hardware details -----------------------------------------------------------

MemTotal: 2011960 kB

system type		: ubnt,e200 (CN6120p1.1-1000-NSP)
machine			: Unknown
processor		: 0
cpu model		: Cavium Octeon II V0.1
BogoMIPS		: 2000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 128
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
isa			: mips2 mips3 mips4 mips5 mips64r2
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 3
package			: 0
core			: 0
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 1
cpu model		: Cavium Octeon II V0.1
BogoMIPS		: 2000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 128
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
isa			: mips2 mips3 mips4 mips5 mips64r2
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 3
package			: 0
core			: 1
VCED exceptions		: not available
VCEI exceptions		: not available

A.


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