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Re: input address reload issue

On 01/05/2017 09:18 AM, Aurelien Buhrig wrote:
Hi all, and best wishes for the happy new year!

I'm porting a private 4.6 backend to GCC 6 and facing a reload issue and
I would appreciate a little help to cope with it.

The issue happens when reloading:

(set (reg:QI 47 [ _9 ])
  (mem:QI (plus:SI (reg/v/f:SI 68 [orig:51 in ] [51])
                (const_int 1 [0x1])

My understanding is that IRA allocates hardregs to allocno which are
replaced by the reload pass which generates new reloads or spills regs
when needed, right?

Here the IRA chooses a reg (named r2)which makes the mem address not
legitimate. Is it valid to allocate a reg which makes non legitimate

Assuming it is, my understanding is that the reload chooses a legitimate
reg (named a0 here) and shall emit insns (in emit_reload_insns) to set
a0 correctly (RELOAD_FOR_INPUT_ADDRESS). Right?

So the insn:
(set (reg:QI 0 r0) (mem:QI (plus:SI (reg:SI 2 r2)(const_int 1))

is transformed into:
(set (reg:SI 8 a0) (reg:SI 2 r2))
(set (reg:SI 8 a0) (const_int 1))
(set (reg:SI 8 a0) (plus:SI (reg:SI 8 a0) (reg:SI 8 a0)))
(set (reg:QI 0 r0) (mem:QI (reg:SI 8 a0))

This "basic" transformation requires two reload regs, but only one is
given/used/possible from the rl structure (in emit_reload_insns).

So where does the issue comes from? The need for 2 reload regs, the
transformation which is too "basic" and could be optimized to use only
one reload reg, or any wrong/missing reload target hook?
Sounds like you need secondary or intermediate reloads.

Alternately, convert your port to LRA. It probably will still require some work, but LRA (rather than reload) is where the team focuses their energy these days.


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