This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Successful bootstrap and install of gcc (GCC) 6.2.0 on mips64-unknown-linux-gnu


Hi,

Here's a report of a successful build and install of GCC:

$ gcc-6.2.0/config.guess
mips64-unknown-linux-gnu

$ newcompiler/bin/gcc -v
Using built-in specs.
COLLECT_GCC=newcompiler/bin/gcc
COLLECT_LTO_WRAPPER=/home/aaro/gcctest/newcompiler/libexec/gcc/mips-unknown-linux-gnu/6.2.0/lto-wrapper
Target: mips-unknown-linux-gnu
Configured with: ../gcc-6.2.0/configure --with-arch=octeon+ --with-abi=32 --enable-targets=all --with-float=soft --disable-nls --prefix=/home/aaro/gcctest/newcompiler --enable-languages=c,c++ --host=mips-unknown-linux-gnu --build=mips-unknown-linux-gnu --target=mips-unknown-linux-gnu --with-system-zlib --with-sysroot=/
Thread model: posix
gcc version 6.2.0 (GCC) 

-- Build environment ----------------------------------------------------------

host:	  edgerouter-pro
distro:	  los.git rootfs=b1da70 native=b1da70
kernel:	  Linux 4.8.0-rc8-octeon-los_891f8de
binutils: GNU binutils 2.27
make:	  GNU Make 4.1
libc:	  GNU C Library (GNU libc) stable release version 2.24
zlib:	  1.2.8
mpfr:	  3.1.3
gmp:	  60000

-- Time consumed --------------------------------------------------------------

configure:	real	0m 12.29s
		user	0m 10.31s
		sys	0m 0.88s

bootstrap:	real	12h 57m 14s
		user	23h 36m 27s
		sys	26m 42.72s

install:	real	4m 1.97s
		user	2m 21.02s
		sys	0m 12.35s

-- Hardware details -----------------------------------------------------------

MemTotal: 2009364 kB

system type		: ubnt,e200 (CN6120p1.1-1000-NSP)
machine			: Unknown
processor		: 0
cpu model		: Cavium Octeon II V0.1
BogoMIPS		: 2000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 128
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
isa			: mips2 mips3 mips4 mips5 mips64r2
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 3
package			: 0
core			: 0
VCED exceptions		: not available
VCEI exceptions		: not available

processor		: 1
cpu model		: Cavium Octeon II V0.1
BogoMIPS		: 2000.00
wait instruction	: yes
microsecond timers	: yes
tlb_entries		: 128
extra interrupt vector	: yes
hardware watchpoint	: yes, count: 2, address/irw mask: [0x0ffc, 0x0ffb]
isa			: mips2 mips3 mips4 mips5 mips64r2
ASEs implemented	:
shadow register sets	: 1
kscratch registers	: 3
package			: 0
core			: 1
VCED exceptions		: not available
VCEI exceptions		: not available

A.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]