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Question about Cortex bit-banding feature
- From: "Fredrik Hederstierna" <fredrik dot hederstierna at verisure dot com>
- To: gcc at gcc dot gnu dot org
- Date: Fri, 29 Jul 2016 08:25:49 +0000
- Subject: Question about Cortex bit-banding feature
- Authentication-results: sourceware.org; auth=none
Some processor architectures do support bitwise access to memory, eg. ARM Cortex-M and 8051 (by ARM called bit-banding).
In these architectures a single bit can somewhat be addressable, but only as an 'aliased' memory region for another memory address.
I noticed that Keil ARMCC compiler now seems to support this huge optimization possibility.
ARMCC mark bit-bandable types as __attribute__((bitband)), then when declaring, an reference to bit-banded memory is given.
char i : 1;
int j : 2;
int k : 3;
} BB __attribute__((bitband));
BB bb __attribute__((at(0x20000004)));
bb.i = 1;
Should something similar be possible in GCC, using attributes or similar to mark this feature possible to utilize,
then pick up this at a very late target specific optimization pass that could use bit-banding when possible?
Like eg. a Cortex peephole2 or something similar?
Have anyone maybe already tried to look into this feature in GCC?
Is it a good idea, or even possible?