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Re: (R5900) Implementing Vector Support
- From: Woon yung Liu <ysai187 at yahoo dot com>
- To: Matthew Fortune <Matthew dot Fortune at imgtec dot com>, Richard Henderson <rth at redhat dot com>, Gcc Mailing List <gcc at gcc dot gnu dot org>
- Date: Sat, 25 Jun 2016 10:23:24 +0000 (UTC)
- Subject: Re: (R5900) Implementing Vector Support
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- Reply-to: Woon yung Liu <ysai187 at yahoo dot com>
I have managed to fix the problems mentioned earlier. Part of the problem (segmentation fault) was caused by logical operations with register modes (i.e. QImode, DImode) other than SImode.
The other issue was the use of gen_lowpart. Replacing all calls to gen_lowpart within the affected pattern with calls to simplify_gen_subreg, solved the ICEs.
I have also attempted to implement the PMADDH and PMSUBH patterns (parallel MADD and MSUB, for 8x16-bit values), but they don't work. I believe that it's because GCC can't find a use for them, given that parallel-multiplication is currently done with both inputs and outputs to only GPRs (doesn't expose the HI+LO registers).
Unfortunately, when I attempted to change the design of the mulv8hi3 pattern to be like the MIPS mulsidi3 pattern (output to HI+LO), GCC begun spewing assertion fails within expand_mult because of expand_binop when it tries to compile any multiplication between vectors. I haven't managed to find that function yet, but I guess that this means that I can't do that (probably due to an internal check against UNITS_PER_WORD?).
Regarding the auto-vectorization problems that I mentioned before, it seems like the message "conversion not supported by target" is caused by targetm.vectorize.builtin_conversion not ever being set. Unfortunately, it seems like that target hook was deprecated in all existing ports (i.e. rs6000 and i386), sometime in 2011.
What are the new requirements for supporting vectorization?
Thanks and regards,