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Re: (R5900) Implementing Vector Support

Hi again,

I wasn't sure if I was allowed to ask for help like that, hence why I never posted much code.
It is also likely possible that I was confused by the number of weird errors that I've been getting.

I got the fault in gen_lowpart earlier on because I was assigning mask = GEN_INT (0xffff) at some point, which doesn't work (as you've described). The changes were made because I was trying to get rid of this odd segmentation fault.
The version of GCC that I am currently working on, is v5.3.0.

Anyway, here is the pattern for vec_set, which suddenly started to cause segmentation faults within mips.c after converting the define_insn_and_split in various parts to define_expand:
  (define_expand "vec_set<mode>"
   [(set (match_operand:MMI_VWHB 0 "register_operand" "+d")
         (zero_extend:MMI_VWHB (match_operand:<MMI_VWHB_SCAL> 1 "register_operand" "d")))
                               (match_operand 2 "const_int_operand" "")]
  machine_mode mode = GET_MODE (operands[0]), imode = GET_MODE_INNER (mode);
  rtx rotated, mask;

    mask = gen_reg_rtx (imode);
      case V16QImode:
        mips_emit_move (mask, GEN_INT (0xff));
      case V8HImode:
        mips_emit_move (mask, GEN_INT (0xffff));
           case V4SImode:
        mips_emit_move (mask, GEN_INT (0xffffffff)); <- is here, but it the execution flow actually runs 3 lines above.

  mask = gen_lowpart (mode, mask);
  //  mask = gen_rtx_REG (mode, REGNO (mask));
  emit_insn (gen_one_cmpl<mode>2 (mask, mask));
  rotated = gen_lowpart (mode, operands[1]);
  //  rotated = gen_rtx_REG (mode, REGNO (operands[1]));
  if (INTVAL(operands[2]) > 0)
      emit_insn (gen_rotl<mode>3 (rotated, rotated, operands[2]));
      emit_insn (gen_rotl<mode>3 (mask, mask, operands[2]));

  emit_insn (gen_and<mode>3 (operands[0], operands[0], mask));
  emit_insn (gen_ior<mode>3 (operands[0], operands[0], rotated));


The segmentation fault:
  testv.c: In function 'testv8set':
  testv.c:55:9: internal compiler error: Segmentation fault
  vec[0] = one;
  0x9046af crash_signal
  0xb505b5 mips_legitimize_const_move
  0xb505b5 mips_legitimize_move(machine_mode, rtx_def*, rtx_def*)
  0xb8ffd8 gen_movhi(rtx_def*, rtx_def*)
  0x6abffa insn_gen_fn::operator()(rtx_def*, rtx_def*) const
  0x6abffa emit_move_insn_1(rtx_def*, rtx_def*)
  0x6ac3e0 emit_move_insn(rtx_def*, rtx_def*)
  0xb87916 gen_vec_setv8hi(rtx_def*, rtx_def*, rtx_def*)
  0x839498 maybe_expand_insn(insn_code, unsigned int, expand_operand*)
  0x69c863 store_bit_field_1
  0x69d00e store_bit_field(rtx_def*, unsigned long, unsigned long, unsigned long, unsigned long, machine_mode, rtx_def*)
  0x6b2d26 store_field
  0x6b2d26 store_field
  0x6b3837 expand_assignment(tree_node*, tree_node*, bool)
  0x5e5853 expand_gimple_stmt_1
  0x5e5853 expand_gimple_stmt
  0x5e6afe expand_gimple_basic_block
  0x5e8a6e execute

The part within mips_legitimize_const_move of mips.c that is faulting:

  /* When using explicit relocs, constant pool references are sometimes
  not legitimate addresses.  */
  mips_split_symbol (dest, XEXP (src, 0), mode, &XEXP (src, 0));
  mips_emit_move (dest, src);

Test code:
  __v8hi testv8set(__v8hi vec, short int one, short int two, short int three, short int four)
    vec[0] = one;
    vec[1] = two;
    vec[2] = three;
    //	vec[3] = four;

    return vec;

Thank you for your time, and have a nice day.

-W Y

On Saturday, June 4, 2016 12:35 AM, Richard Henderson <> wrote:
> I would suggest that you post actual code to the list so that people can help 
> you.  Simply answering questions in the abstract, as I have been doing, can 
> only go so far.

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