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Re: (R5900) Implementing Vector Support
- From: Richard Henderson <rth at redhat dot com>
- To: Woon yung Liu <ysai187 at yahoo dot com>, Gcc Mailing List <gcc at gcc dot gnu dot org>
- Date: Tue, 31 May 2016 14:44:51 -0700
- Subject: Re: (R5900) Implementing Vector Support
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On 05/29/2016 12:59 AM, Woon yung Liu wrote:
Hi Richard,
I have solved the problems with the mulv8hi3 pattern; I needed to adjust the code within mips.c to allow the double-sized vector modes and to allow vector modes into the LO+HI accumulators.
Yes, I should have mentioned that you would need to do that.
What is the correct way to change the mode of registers? For example, I am doing this to change the mode for a register to V4SI within an expand:
reg = gen_rtx_REG(V4SImode, REGNO (reg));
This is almost always incorrect, and certainly before reload.
You need to use gen_lowpart. There are examples in the code
fragments that I sent the other week.
Finally, what is the difference between define_expand and define_insn_and_split? When should I ever use define_insn_and_split?
You need to read the gcc internals documentation. They are all three different
uses, though there is some overlap between define_insn and define_expand.
Are define_insn_and_split patterns used to avoid pseudo registers?
No.
r~