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Re: (R5900) Implementing Vector Support

Hi Richard,

I have solved the problems with the mulv8hi3 pattern; I needed to adjust the code within mips.c to allow the double-sized vector modes and to allow vector modes into the LO+HI accumulators.
I now have a choice to choose between the design that you have suggested or the one that I came up with. If it would be preferable to not mix the logical vector modes (i.e. those 256-bit modes that the R5900 does not actually support) into mips.c, then I suppose that I would go with my design because the 256-bit stuff would be restricted to the patterns within

I have also implemented vec_unpacks_hi, vec_unpacks_lo, vec_unpacku_lo, vec_unpacks_hi, vec_pack_trunc, vec_set and vec_extract patterns for the V16QI, V8HI and V4SI patterns. The only pattern that I haven't implemented yet is vec_init.
The problem with the vectorization stuff has not changed (, despite the introduction of these new patterns.
You wrote that I should look at tree-vect-stmts.c, but I have not done that yet.

What is the correct way to change the mode of registers? For example, I am doing this to change the mode for a register to V4SI within an expand:
           reg = gen_rtx_REG(V4SImode, REGNO (reg));

While going through the GCC sources, it seems like such a method is not going to work if a pseudo register is passed. When are pseudo registers ever allocated?

Finally, what is the difference between define_expand and define_insn_and_split? When should I ever use define_insn_and_split?
Are define_insn_and_split patterns used to avoid pseudo registers?

Thanks and regards,
-W Y

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