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Re: (R5900) Implementing Vector Support
- From: Richard Henderson <rth at redhat dot com>
- To: Woon yung Liu <ysai187 at yahoo dot com>, Gcc Mailing List <gcc at gcc dot gnu dot org>
- Date: Mon, 16 May 2016 14:03:35 -0700
- Subject: Re: (R5900) Implementing Vector Support
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On 05/14/2016 03:21 AM, Woon yung Liu wrote:
The current constraints allow GCC to access the 64-bit LO+HI register pair
as a single 128-bit register, so I am cheating by using both the x and wr
(new constraint for LO1+HI1) constraints.
That doesn't seem right.
The x constrant is for the hi/lo pair, whatever size it is. You should be able
to use that just fine with a 256 bit mode.