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(R5900) Implementing Vector Support

Hi all,

As adviced, I am now trying to implement support for vectors since the R5900's MMI extension is like MMX.
However, I can't seem to find documentation on how to implement some things.
So far, I've implemented bitwise and arithmetic operations, based on what I've seen the Loongson port do.

Could somebody please point me to documentation that could answer my doubts, or help me to understand them?

I can't figure out how to implement comparison operations (specifically, equals and the greater than operators). The GCC documentation mentions that the pattern for comparison (==) should be vec_cmp, but I don't understand why it has 4 operands and what they are used for. I've implemented it anyway, but GCC does not use it.
I've taken a look at the rs6000 and Loongson ports, and they seem to be implementing their comparison operators with some non-standard pattern name and the pattern operations are different too (i.e. Loongson uses unspec, while rs6000 uses gt and eq).

What happens what multiplication or division is performed a vector? For example:
c = a * b;
Whereby a and b are both V4SI vectors. What vector type would C be? Would it become another V4SI (meaning that the multiplication result is truncated) or V4DI?

I also would like to ask about implementing bitwise-shifting. The R5900's vector-shifting instructions are like the MIPS sll, srl and sra instructions, whereby they use an immediate to shift all elements within the vector. Based on the GCC documentation, a scalar can be used, but it will be first converted into a similarly-sized vector 

(to the vector being shifted) containing elements of the scalar's value. Is there a way to implement vector shifting with an immediate?

Right now, GCC would just keep having assertion failures in various files, if I was to implement shifting. The ICE is at expr.c if the immediate is not TI mode, or expmed.c:2349 if the immediate is TI mode. I suppose that it's trying to form a vector, but the R5900 has no instructions for creating vectors and hence I never implemented such a pattern. There is no support for TI mode, so I don't know if specifying TI mode for the immediate is even the right thing to do.

Finally, what should I be modifying, if I want to implement extraction and packing of the upper 64-bits of the 128-bit vector? Right now, GCC will just generate multiple shifts 
 (i.e. dsll32) to access the upper 64-bits, which is not legal. This means that using any operation that requires unimplemented patterns will not work correctly.

Thanks in advance!

Thanks and regards,
-W Y

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