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Re: (MIPS R5900) Adding support for the FPU (COP1) instructions


Hi Matt,




On Wednesday, March 30, 2016 5:57 PM, Matthew Fortune <Matthew.Fortune@imgtec.com> wrote:
> Given that the base architecture has support for all the operations you
> listed (using just FPRs) then there needs to be some way to indicate why

>the accumulator based patterns should be used instead. (or you could

> simply only use these patterns when targeting the FPU extension in

> R5900). So... Under what circumstance is it preferable to use these

> instructions?


The R5900 has no support for any of the normal versions of those instructions, so they're currently disabled when the R5900 is the target; the basic instructions like mul.s and add.s are used instead, which leads to less efficient code being generated (2 instructions instead of one, for each multiply and add sequence).
If I was to modify the madd.s instruction pattern to not use the accumulator register (even though this is wrong), then GCC would select that pattern to emit... which leads me to think that the new patterns are being found by GCC, but are somehow not preferred.


As for when they're to be used: I believe that the addition (adda.s), subtraction (suba.s) and multiplication (mula.s) instructions are for supporting the madd.s and madda.s instructions, given that there is no other way to place a value into the accumulator register.
madda.s is for continuing the multiply-and-add chain, while madd.s would be used at the very end of it (it'll allow the result to be returned in a normal FPR).


The same thing goes for the multiply-and-subtract (MSUB) instructions, but for subtraction instead of addition.

Thanks and regards,
-W Y


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