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Mysterious decision in combine


Well, at least what combine does here is a mystery to me (s390x
with -O3 in case it matters).

Rtl before combine:

-- snip --
(insn 6 3 7 2 (parallel [
            (set (reg:SI 64)
                (and:SI (mem:SI (reg/v/f:DI 63 [ a ]) [1 *a_2(D)+0 S4 A32])
                    (const_int -65521 [0xffffffffffff000f])))
            (clobber (reg:CC 33 %cc))
        ]) andc-immediate.c:21 1481 {*andsi3_zarch}
     (expr_list:REG_DEAD (reg/v/f:DI 63 [ a ])
        (expr_list:REG_UNUSED (reg:CC 33 %cc)
            (nil))))
(insn 7 6 12 2 (set (reg:DI 65)
        (zero_extend:DI (reg:SI 64))) andc-immediate.c:21 1207 {*zero_extendsidi2}
     (expr_list:REG_DEAD (reg:SI 64)
        (nil)))
(insn 12 7 13 2 (set (reg/i:DI 2 %r2)
        (reg:DI 65)) andc-immediate.c:22 1073 {*movdi_64}
     (expr_list:REG_DEAD (reg:DI 65)
        (nil)))
-- snip --

How does combine get this idea (it's the only match in the
function)?

  Trying 7 -> 12:
  Successfully matched this instruction:
  (set (reg/i:DI 2 %r2)
      (and:DI (subreg:DI (reg:SI 64) 0)
          (const_int 4294901775 [0xffff000f])))
  allowing combination of insns 7 and 12

=>

-- snip --
(insn 6 3 7 2 (parallel [
            (set (reg:SI 64)
                (and:SI (mem:SI (reg:DI 2 %r2 [ a ]) [1 *a_2(D)+0 S4 A32])
                    (const_int -65521 [0xffffffffffff000f])))
            (clobber (reg:CC 33 %cc))
        ]) andc-immediate.c:21 1481 {*andsi3_zarch}
     (expr_list:REG_DEAD (reg:DI 2 %r2 [ a ])
        (expr_list:REG_UNUSED (reg:CC 33 %cc)
            (nil))))
(insn 12 7 13 2 (parallel [
            (set (reg/i:DI 2 %r2)
                (and:DI (subreg:DI (reg:SI 64) 0)
                 ^^^
                    (const_int 4294901775 [0xffff000f])))
                                           ^^^^^^^^^^
            (clobber (reg:CC 33 %cc))
        ]) andc-immediate.c:22 1474 {*anddi3}
     (expr_list:REG_UNUSED (reg:CC 33 %cc)
        (expr_list:REG_DEAD (reg:SI 64)
            (nil))))
-- snip --

It combines "zero extend" + "copy to hardreg" into an "and with
0xffff000f".  That is the correct result for combining insn 6 + 7
+ 12, however.  (Eventually the two "and"s with constant values
are not merged into a single "and" with a single constant.)

(dumps attached)

Ciao

Dominik ^_^  ^_^

-- 

Dominik Vogt
IBM Germany

Attachment: andc-immediate.c.242r.ud_dce
Description: Text document

Attachment: andc-immediate.c.243r.combine
Description: Text document

#if 0 /*!!!*/
unsigned long andc_64_vv(unsigned long a)
{
  return ~0xf0lu & a;
}

unsigned long andc_64_pv(unsigned long *a)
{
  return ~0xf0lu & *a;
}

unsigned int andc_32_vv(unsigned int a)
{
  return 0xffff1234u & a;
}
#endif

#if 1 /*!!!*/
unsigned int andc_32_pv(unsigned int *a)
{
  return ~0xfff0u & *a;
}
#endif

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