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Re: Validity of SUBREG+AND-imm transformations
- From: Jeff Law <law at redhat dot com>
- To: Richard Biener <richard dot guenther at gmail dot com>, Kyrill Tkachov <kyrylo dot tkachov at foss dot arm dot com>, Segher Boessenkool <segher at kernel dot crashing dot org>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Fri, 4 Mar 2016 09:21:59 -0700
- Subject: Re: Validity of SUBREG+AND-imm transformations
- Authentication-results: sourceware.org; auth=none
- References: <56D055C6 dot 6040800 at foss dot arm dot com> <56D0C2A1 dot 1070501 at redhat dot com> <56D422AC dot 2000703 at foss dot arm dot com> <20160304115946 dot GA20650 at gate dot crashing dot org> <56D99E93 dot 70209 at foss dot arm dot com> <56D9A035 dot 2010902 at foss dot arm dot com> <54FB3F2C-EEE0-49E7-BFE5-BF17209B449C at gmail dot com>
On 03/04/2016 08:05 AM, Richard Biener wrote:
That's probably worth exploring. I wouldn't be at all surprised if it
that turns out to be better than any individual mode, not just for arm
& aarch64, but would help a variety of targets.
does that mean that the shift amount should be DImode?
Seems like a more flexible approach would be for the midend to be able
to handle these things...
Or macroize for all integer modes?
My worry is that such a change will bleeds out beyond just the standard
shifting and shadd style patterns in each port. I guess that would
largely depend on how many combiner patterns a port has which combine a
shift with some other operation.