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Re: Implementing TI mode (128-bit) and the 2nd pipeline for the MIPS R5900

Hi again,

> You'll have to adjust FUNCTION_ARG and its counterpart for return values
> to describe how to pass these 128 bit values around.

I have managed to adjust TARGET_FUNCTION_ARG and it appears that the problem with having two registers allocated for one 128-bit argument has been resolved. I have also managed to get the code in other areas in shape too.
Many thanks for that, to you and the folks here!

However, I am unable to find the part to edit for the return values. Based on the documentation available, it seems that I have to edit TARGET_LIBCALL_VALUE and TARGET_FUNCTION_VALUE. However, I don't see anything in mips_function_value_1 (which is the TARGET_LIBCALL_VALUE/TARGET_FUNCTION_VALUE function) that looks like the part that I should edit; it eventually just calls gen_rtx_REG like this:

gen_rtx_REG (mode, GP_RETURN)

Neither does it seem to have code to split the scalar return value into parallel registers.
What should I do? I've tried to trace the code for gen_rtx_REG, and it seems to eventually lead to a macro that simply sets the mode attribute of the register - a dead end. I'm stumped.

I also need to fix the part of the inline functions that unpacks and repacks large data types (TI mode in this case). Right now, addition of TI-mode integers is broken because the generated inline addition function is just adding the same register to itself - the code to unpack/repack the large data type seems to be missing from my target.

I'm referring to functions like addti3, as there is no MMI for adding 128-bit words (hence a substitute is required).
Unfortunately, I haven't been able to figure out what I should be working on here either, as it doesn't seem to be within libgcc. Could you or anyone please give me a hint here, so that I can know where to start from?


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