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Re: Instruction scheduler rewriting instructions?
- From: Steve Ellcey <sellcey at imgtec dot com>
- To: Ramana Radhakrishnan <ramana dot gcc at googlemail dot com>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Thu, 3 Dec 2015 13:35:20 -0800
- Subject: Re: Instruction scheduler rewriting instructions?
- Authentication-results: sourceware.org; auth=none
- References: <6ff241d6-c5fa-46cf-bb25-b45c188716d7 at BAMAIL02 dot ba dot imgtec dot org> <CAJA7tRYjtyE9AjEUwhRvTH4c=QFk=FGYcPipsy4SbnE_rF7Y6A at mail dot gmail dot com>
- Reply-to: <sellcey at imgtec dot com>
On Thu, 2015-12-03 at 19:56 +0000, Ramana Radhakrishnan wrote:
> IIRC it's because the scheduler *thinks* it can get a tighter schedule
> - probably because it thinks it can dual issue the lbu from $4 and the
> addiu to $5. Can it think so ? This may be related -
No, the system I am tuning for (MIPS 24k) is single issue according to
its description. At least I do see now where the instruction is getting
rewritten in the instruction scheduler, so that is helpful. I am no
longer sure the scheduler is where the problem lies though. If I
compile with -O2 -mtune=24kc I get this loop:
If I use -O2 -fno-ivopts -mtune=24kc I get:
This second loop is better because there is more time between the loads
and where the loaded values are used in the beq instructions. So I
think there is something missing or wrong in the cost analysis that
ivopts is doing that it decides to do the adds before the loads instead
of visa versa.
I have tried tweaking the cost of loads in mips_rtx_costs and in the
instruction descriptions in 24k.md but that didn't seem to have any
affect on the ivopts code.