RE: RFC: Support x86 interrupt and exception handlers

[Matthew Fortune <Matthew dot Fortune at imgtec dot com>]

H.J. Lu <hjl.tools@gmail.com> writes:
> On Tue, Sep 15, 2015 at 2:45 PM, Matthew Fortune
> <Matthew.Fortune@imgtec.com> wrote:
> > H.J. Lu <hjl.tools@gmail.com> writes:
> >> On Thu, Sep 3, 2015 at 10:37 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> >> > The interrupt and exception handlers are called by x86 processors.  X86
> >> > hardware puts information on stack and calls the handler.  The
> >> > requirements are
> >> >
> >> > 1. Both interrupt and exception handlers must use the 'IRET' instruction,
> >> > instead of the 'RET' instruction, to return from the handlers.
> >> > 2. All registers are callee-saved in interrupt and exception handlers.
> >> > 3. The difference between interrupt and exception handlers is the
> >> > exception handler must pop 'ERROR_CODE' off the stack before the 'IRET'
> >> > instruction.
> >> >
> >> > The design goals of interrupt and exception handlers for x86 processors
> >> > are:
> >> >
> >> > 1. No new calling convention in compiler.
> >> > 2. Support both 32-bit and 64-bit modes.
> >> > 3. Flexible for compilers to optimize.
> >> > 4. Easy to use by programmers.
> >> >
> >> > To implement interrupt and exception handlers for x86 processors, a
> >> > compiler should support:
> >> >
> >> > 1. void * __builtin_ia32_interrupt_data (void)
> >>
> >> I got a feedback on the name of this builtin function.  Since
> >> it also works for 64-bit,  we should avoid ia32 in its name.
> >> We'd like to change it to
> >>
> >> void * __builtin_interrupt_data (void)
> >>
> >> Any comments?
> >
> > For what it's worth, this seems like a good plan to me. I don't know x86
> > but how many variations of interrupt and exception handling mechanisms
> > are there? If there are lots then you may want to make it clear which
> > subset of them you intend to support. I just added a few more variations
> > of interrupt handlers to MIPS and it got complicated quite quickly.
> >
> > I think I remember someone asking about interrupt handler support for
> > x86 some time ago and the answer then was that there were too many
> > variants to make it useful.
> 
> In my proposal, there are only 2 handlers: interrupt and exception.
> __builtin_interrupt_data is provided to programmers to implement
> different variants of those handlers.

Yes, I realised that but was just curious how many hardware interrupt
handling schemes there are for x86. I.e. How the handlers are glued into
an interrupt vector/how they get routed. Is there a generic piece of
code that could at least hook up/install an exception handler on most
x86 variants?

Matthew