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avr non-optimal optimization


I tried compiling the following code with  -mmcu=attiny13a  -Os -flto
using 4.8 and 5.1:

#define NOT_A_REG 0

#define digitalPinToPortReg(PIN) \
    ( ((PIN) >= 0 && (PIN) <= 7) ? &PORTB : NOT_A_REG)

#define digitalPinToBit(P) ((P) & 7)

#define HIGH 1
#define LOW 0

inline void digitalWrite(int pin, int state)
{
    if ( state & 1 ) {
        // set pin
        *(digitalPinToPortReg(pin)) |= (1 << digitalPinToBit(pin));
    }
    if ( !(state & 1 ) ) {
        // clear pin
        *(digitalPinToPortReg(pin)) &= ~(1 << digitalPinToBit(pin));
    }
}

void main()
{
    digitalWrite(3,SREG);
}

Both compiled to the same assembler code:
  22:   0f b6           in      r0, 0x3f        ; 63
  24:   00 fe           sbrs    r0, 0
  26:   02 c0           rjmp    .+4             ; 0x2c <main+0xa>
  28:   c3 9a           sbi     0x18, 3 ; 24
  2a:   08 95           ret
  2c:   c3 98           cbi     0x18, 3 ; 24
  2e:   08 95           ret

However the following code is 1 instruction shorter (and 1 cycle
faster when other code follows that would require rjmp +2 at 2a):
in r0, 0x3f
sbrs r0, 0
cbi 0x13, 3
sbrc r0, 0
sbi 0x13, 3
ret


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