Re: [i386] Scalar DImode instructions on XMM registers

[Ilya Enkovich <enkovich dot gnu at gmail dot com>]

On 19 May 11:22, Vladimir Makarov wrote:
> On 05/18/2015 08:13 AM, Ilya Enkovich wrote:
> >2015-05-06 17:18 GMT+03:00 Ilya Enkovich <enkovich.gnu@gmail.com>:
> >Hi Vladimir,
> >
> >Could you please comment on this?
> >
> >
> Ilya, I think that the idea is worth to try but results might be
> mixed.  It is hard to say until you actually try it (as example, Jan
> implemented -fpmath=both and it looks a pretty good idea at least
> for me but when I checked SPEC2000 the results were not so good even
> with IRA/LRA).
> 
> Long ago I did some experiments and found that spilling into SSE
> would benefitial for Intel CPUs but not for AMD ones.  As I remember
> I also found that storing several scalar values into one SSE reg and
> extracting it when you need to do some (fp) arithmetics would
> benefitial for AMD but not for Intel CPUs.   In literature more
> general approach is called bitwise register allocator.  Actually it
> would be a pretty big IRA/LRA project from which some targets might
> benefit.

I suspect such things are not trivially done in IRA/LRA and want to make it as an independent optimization because its application seems to be quite narrow.

> 
> 
> As for the wrong code, it is hard for me to say anything w/o RA
> dumps.  If you send me the dump (-fira-verbose=16), i might say more
> what is going on.
> 
> 

Here are some dumps from my reproducer.  The problematic register is r108.

Thanks,
Ilya

Attachment: small.c.233r.ira
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Attachment: small.c.234r.reload
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Attachment: ira-verbose.log
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