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Re: volatile access optimization (C++ / x86_64)


On Fri, 2014-12-26 at 23:19 +0000, Andrew Haley wrote:
> On 26/12/14 22:49, Matt Godbolt wrote:
> > At the moment I think the best I can do is to use an inline assembly
> > version of the increment which prevents GCC from doing any
> > optimisation upon it. That seems rather ugly though, and if anyone has
> > any better suggestions I'd be very grateful.
> 
> Well, that's the problem: do you want a barrier or not?  With no
> barrier there is no guarantee that the data will ever be written to
> memory.  Do you only care about x86 processors?

The C++11 memory model guarantees the following though (1.10p25):
An implementation should ensure that the last value (in modification
order) assigned by an atomic or synchronization operation will become
visible to all other threads in a finite period of time.


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