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Re: volatile access optimization (C++ / x86_64)
- From: Marc Glisse <marc dot glisse at inria dot fr>
- To: Matt Godbolt <matt at godbolt dot org>
- Cc: GCC Development <gcc at gcc dot gnu dot org>
- Date: Fri, 26 Dec 2014 23:51:41 +0100 (CET)
- Subject: Re: volatile access optimization (C++ / x86_64)
- Authentication-results: sourceware.org; auth=none
- References: <CAFWXXN3quEdSnaoWuPcQn2k-F99Yaw+6=NqgFgcu9ABpv5ZD3Q at mail dot gmail dot com>
- Reply-to: GCC Development <gcc at gcc dot gnu dot org>
On Fri, 26 Dec 2014, Matt Godbolt wrote:
I'm investigating ways to have single-threaded writers write to memory
areas which are then (very infrequently) read from another thread for
monitoring purposes. Things like "number of units of work done".
I initially modeled this with relaxed atomic operations. This
generates a "lock xadd" style instruction, as I can't convey that
there are no other writers.
As best I can tell, there's no memory order I can use to explain my
usage characteristics. Giving up on the atomics, I tried volatiles.
These are less than ideal as their power is less expressive, but in my
instance I am not trying to fight the ISA's reordering; just prevent
the compiler from eliding updates to my shared metrics.
GCC's code generation uses a "load; add; store" for volatiles, instead
of a single "add 1, [metric]".