This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Machine description and code generation


On 26 November 2014 at 16:48, Mathias Roslund <mathias.roslund@amidog.se> wrote:
> Since then I've added more instructions and gotten to the point where most
> stuff seems to be working. My current issue is that signed divide and all
> shift operations insists on sign/zero extending the operands, resulting in
> 32bit operations even when only 8bit ones would be required.

That's a matter of the input language.  In C, you get default promotions to
int from narrower integer types.

> Interestingly,
> multiplies and unsigned divides behave as desired, i.e. only operate on the
> required number of bits.

That's because the results are the same regardless, and the optimizers
are able to undo the effects of the type promotions.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]