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Re: PR63633: May middle-end come up width hard regs for insn expanders?

On Tue, Oct 28, 2014 at 01:06:38PM +0100, Georg-Johann Lay wrote:
> The C test case is
> __attribute__((noinline,noclone))
> unsigned bug_mulhi_highpart (unsigned x)
> {
>     register unsigned reg26 asm ("26") = 10;
>     a = x / 10;
>     __asm volatile ("; %0 " : "+r" (reg26));
>     return reg26;
> }
> int main (void)
> {
>     if (10 != bug_mulhi_highpart (0))
>         __builtin_abort();
>     return 0;
> }
> The specification guarantees reg26 to be allocated to R26/27 only at the
> time it is used as operand to the inline asm.

I'd say if on the target reg26 or reg27 is used or clobbered by
multiplication, then it is a user error to use it this way, the register
then isn't suitable for the local hard register usage.
It is the same thing as trying to use asm ("eax") on i?86 around code that
requires clobbering/setting of that register (e.g. set flags,
division/multiplication etc.).
E.g. glibc when using register asm ("...") carefully puts all needed
computations into temporary variables before entering code with
the local register vars, which are just initialized to the temporaries,
then some inline asm that needs those vars, perhaps save result of some of
the local reg vars into temporaries again and leave the scope with them.
Of course if you use fixed reg or some really general purpose one where you
have several other regs usable for the same purpose, it is not that big
issue as when you use some specialized regs.


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