This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Using modes on parallel in vec_select


We are currently working on the implementation of MSA (SIMD) for MIPS
and are implementing vector interleave instructions which have a
combination of vec_select and vec_concat operators in their patterns.
The selectors for the vec_select operators depend on the vector mode
so to avoid writing multiple patterns we are using this kind of
structure:

(define_insn "msa_ilvev_<msafmt>"
  [(set (match_operand:IMSA 0 "register_operand" "=f")
	(vec_select:IMSA (vec_concat:<DMSA>
				(match_operand:IMSA 1 "register_operand" "f")
				(match_operand:IMSA 2 "register_operand" "f"))
			 (match_operand:IMSA 3 "vec_par_const_ev" "")))]

Operand 3 is a parallel which we are requiring has the same mode as
the vector. This allows the predicate to check for the appropriate
sequence of element selectors based on the mode.

The question is whether it is acceptable to require a mode on the
parallel that forms the element selector?

I.e. Will this requirement prevent any of the standard optimisation
passes (such as combine) from speculatively matching this pattern?

The mode can obviously just be moved into part of the predicate name
and have more predicates but would the current approach cause any
problems?

Thanks,
Matthew


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]