This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Enable EBX for x86 in 32bits PIC code


On 08/28/14 07:01, Uros Bizjak wrote:
On Fri, Aug 22, 2014 at 2:21 PM, Ilya Enkovich <enkovich.gnu@gmail.com> wrote:
Hi,

On Cauldron 2014 we had a couple of talks about relaxation of ebx usage in 32bit PIC mode.  It was decided that the best approach would be to not fix ebx register, use speudo register for GOT base address and let allocator do the rest.  This should be similar to how clang and icc work with GOT base address.  I've been working for some time on such patch and now want to share my results.

+#define PIC_OFFSET_TABLE_REGNUM
          \
+  ((TARGET_64BIT && (ix86_cmodel == CM_SMALL_PIC                       \
+                     || TARGET_PECOFF))
          \
+   || !flag_pic ? INVALID_REGNUM                                       \
+   : X86_TUNE_RELAX_PIC_REG ? (pic_offset_table_rtx ? INVALID_REGNUM   \
+                              : REAL_PIC_OFFSET_TABLE_REGNUM)          \
+   : reload_completed ? REGNO (pic_offset_table_rtx)                   \
     : REAL_PIC_OFFSET_TABLE_REGNUM)

I'd like to avoid X86_TUNE_RELAX_PIC_REG and always treat EBX as an
allocatable register. This way, we can avoid all mess with implicit
xchgs in atomic_compare_and_swap<dwi>_doubleword. Also, having
allocatable EBX would allow us to introduce __builtin_cpuid builtin
and cleanup cpiud.h.
I think for the initial WIP patch it was fine. However I think we all agree that we want EBX as an allocatable register without any special conditions. So I'd recommend pulling this out of the WIP patches as well.
Jeff


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]