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Re: Enable EBX for x86 in 32bits PIC code
- From: Ilya Enkovich <enkovich dot gnu at gmail dot com>
- To: Uros Bizjak <ubizjak at gmail dot com>
- Cc: gcc at gnu dot org, "gcc-patches at gcc dot gnu dot org" <gcc-patches at gcc dot gnu dot org>, Evgeny Stupachenko <evstupac at gmail dot com>, Richard Biener <richard dot guenther at gmail dot com>, Jeff Law <law at redhat dot com>, Vladimir Makarov <vmakarov at redhat dot com>
- Date: Fri, 29 Aug 2014 10:50:56 +0400
- Subject: Re: Enable EBX for x86 in 32bits PIC code
- Authentication-results: sourceware.org; auth=none
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2014-08-28 22:58 GMT+04:00 Uros Bizjak <firstname.lastname@example.org>:
> On Fri, Aug 22, 2014 at 2:21 PM, Ilya Enkovich <email@example.com> wrote:
>> On Cauldron 2014 we had a couple of talks about relaxation of ebx usage in 32bit PIC mode. It was decided that the best approach would be to not fix ebx register, use speudo register for GOT base address and let allocator do the rest. This should be similar to how clang and icc work with GOT base address. I've been working for some time on such patch and now want to share my results.
>> (define_insn "*pushtf"
>> [(set (match_operand:TF 0 "push_operand" "=<,<")
>> - (match_operand:TF 1 "general_no_elim_operand" "x,*roF"))]
>> + (match_operand:TF 1 "nonimmediate_no_elim_operand" "x,*roF"))]
> Can you please explain the reason for this change (and a couple of
> similar changes to push patterns) ?
This is a workaround for stability problem with reload. Immediate
operands cause new usages of pseudo PIC register in reload which leads
to wrong registers allocation. These changes wouldn't be required
after reload issue if resolved.