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Re: [resend] implement assembly variant routines for IEEE floating-point under libgcc for cortex-m0


Thanks for trying this. I agree with you that current C implementation
is far from optimal.

It is in our road-map with a different approach, which will not simply
port current functions from armv7-m to armv6-m. This task is low
priority due to less common usage of fp in Cortex-M0*, so it may take
years to show up in mainline.


On Mon, Aug 4, 2014 at 2:40 PM, Mallikarjun Goudar
<> wrote:
> Hi All,
> sorry, sending previous mail with proper subject line.
> For cortex-m0 (armv6-m) target, i observed that ieee floating-point
> functions under libgcc are implemented in C.
> This takes lot of memory if one uses floating-point in their
> applciations. I agree that usage of fp in cortex-m0 devices might be
> minimal.
> I wanted to check if its good idea to implement these fp functions in
> assembly. As we have already assembly variant functions for cortex-m4
> (armv7-m) targets,
> It would be nice to port those to armv6-m. I have ported couple of
> routines as an exercise. And results looked good. I see
> improvement in size and speed. I ran some fp tests on hardware board
> to see the performance.
> I would be interested in porting remaining functions and contribute to
> the community. I am open to discussion on this.
> Please reply if you feel its good idea to implement this feature.
> If anyone has already working on this, please let me know.
> Thanks,
> Mallikarjuna

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