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Re: negative latencies
- From: shmeel gutl <shmeelgutl at shmuelhome dot mine dot nu>
- To: Andrew Pinski <pinskia at gmail dot com>
- Cc: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>, Vladimir Makarov <vmakarov at redhat dot com>
- Date: Mon, 19 May 2014 09:52:35 +0300
- Subject: Re: negative latencies
- Authentication-results: sourceware.org; auth=none
- References: <5379A125 dot 5090405 at shmuelhome dot mine dot nu> <CA+=Sn1mKxdyZ1cT6z9JH5Q8V+pazL-9KpjHL2HUej1woE8_GpA at mail dot gmail dot com>
On 19-May-14 09:39 AM, Andrew Pinski wrote:
On Sun, May 18, 2014 at 11:13 PM, shmeel gutl
Are there hooks in gcc to deal with negative latencies? In other words, an
architecture that permits an instruction to use a result from an instruction
that will be issued later.
Do you mean bypasses? If so there is a bypass feature which you can use:
Unfortunately, bypasses in the pipeline description is not enough.
They only allow you to calculate the latency of true dependencies. They
are also forced to be zero or greater. The real question is how the
scheduler and register allocator can deal with negative latencies.
At first glance it seems that it will will break a few things.
1) The definition of dependencies cannot come from the simple ordering of
2) The scheduling problem starts to look like "get off the train 3 stops
3) The definition of live ranges needs to use actual instruction timing
information, not just instruction sequencing.
The hooks in the scheduler seem to be enough to stop damage but not enough
to take advantage of this "feature".
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