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Regarding x86 'sete' instruction and its corresponding RTL
- From: Niranjan Hasabnis <nirhasabnis at gmail dot com>
- To: "gcc at gcc dot gnu dot org" <gcc at gcc dot gnu dot org>
- Date: Thu, 3 Apr 2014 21:34:51 -0400
- Subject: Regarding x86 'sete' instruction and its corresponding RTL
- Authentication-results: sourceware.org; auth=none
Hello,
I'm a student and am currently studying compiler. I was studying
GCC's i386 MD, and I found that RTL insn mapped to 'sete' assembly
instruction seems to have exactly opposite semantics than 'sete'
instruction itself. Below are more details. If someone could clarify the
issue, or let me know if I am wrong, then that would be great.
----------------------------------------------------------------
RTL: (set (reg:QI 0 ax)
(eq:QI (reg:CCZ 17 flags) (const_int 0)))
Assembly: sete %al
----------------------------------------------------------------
Semantics of sete instruction is (as per Intel manual):
if zero flag = 1, (reg:QI ax) = 1
else (reg:QI ax) = 0
Where as (I believe) RTL semantics seems to say that:
- if zero flag = 0, (reg:QI ax) = 1
else (reg:QI ax) = 0
This is because 'eq' operator returns STORE_FLAG_VALUE when both
operands of 'eq' are equal. Otherwise, it returns 0. This is exactly
opposite of what assembly semantics is.
Am I missing something? Please let me know.
Thanks.