This is the mail archive of the gcc@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Reg Alloc Problem.


Hi All,

To handle the below problem i.e making specific set of register as
base registers ,which is the subset of general registers set.

we see the *.c.208.ira logs as

Pass 0 for finding pseudo/allocno costs


    r21: preferred BASE_REGS, alternative GENERAL_REGS, allocno GENERAL_REGS

    a2 (r21,l0) best BASE_REGS, allocno GENERAL_REGS

    r19: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS

    a0 (r19,l0) best GENERAL_REGS, allocno GENERAL_REGS

    r18: preferred GENERAL_REGS, alternative NO_REGS, allocno GENERAL_REGS

    a1 (r18,l0) best GENERAL_REGS, allocno GENERAL_REGS



  a0(r19,l0) costs: LOW_8BIT_REGS:0 BASE_REGS:0 GENERAL_REGS:0 ALL_REGS:0 MEM:8

  a1(r18,l0) costs: LOW_8BIT_REGS:0 BASE_REGS:0 GENERAL_REGS:0 ALL_REGS:0 MEM:8

  a2(r21,l0) costs: LOW_8BIT_REGS:2 BASE_REGS:0 GENERAL_REGS:4 ALL_REGS:4 MEM:8


where IRA choose the GENERAL_REG over BASE (preferred) for the r21
pseudo,i'm looking for the cause in our backend,but mean while anyone
in the group can share there experience w.r.t that will help me to
solve issue asap.

Thank you
~Umesh


On Wed, Mar 12, 2014 at 7:30 PM, Umesh Kalappa <umesh.kalappa0@gmail.com> wrote:
> Hi All,
>
> We are porting the gcc 4.8.1 to the new target and which has the pair
> 16 bit registers  like AB or CD or EF   and we modeled  it in
> reg_class as AB,CD and DE 16 bit pair_regs and CD ,EF as 16 bit
> base_regs and A,B,C,D E  and F as 8 bit as general_regs.
>
> We are stuck with below issues like
>
> 1)How do we modelled such that the register alloc to pick the
> respective  base_regs i.e CD,DE  instead of AB as show in the below
> case
>
> LD AB ,_a;        //invalid instead of it should be emit LD CD ,_a
>
> LD (AB),#100;      // invalid instead of it should be emit LD (CD),#100
>
>
> Please note  that we override  the target hook like REGNO_REG_CLASS
> ,but still no luck here .
>
>  2)Current target enforce the restrictions on  the pair register set
> usage for multiplication  like
>
> MUL A,B  or MUL C,D or  MUL E,F
>
> But not MUL A,C or MUL  B,C  etc not across the pair_regs .
>
>
> Anyone can  please shed some lights here ,will be appreciate  and help
> us in the great way .
>
>  Thank you for the patience
>
> ~Umesh


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]