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Re: delay slot of conditionnal branch with no annuled jump strategy


I have a gcc 4.6.1 port that has the same sort of  problems.  I tried selectively porting some patches from later 4.6 releases, but they didn't seem to actually address the issue.  I haven't looked at the trunk to see if there are patches that are more apropos.

On Oct 10, 2013, at 12:33 PM, Jeff Law <law@redhat.com> wrote:

> On 10/10/13 07:31, BELBACHIR Selim wrote:
>> 
>> Why GCC doesn't see, in this case, that it's not safe to fill the delay slot with my compare insn (which is a parallel RTX which clobber one register used in fallthrough branch) ?
>> Is a processor 'annuled jump strategy' mandatory to handle delay slot of conditionnal jump instructions ?
> You'd need to debug reorg.  reorg has code to track resources to avoid these kind of issues.  You'd have to debug why it's not working as expected.
> 
> annulling is not required for proper functioning of the reorg pass, it's merely an optimization.
> 
> I'd start by first verifying your delay slot descriptions do not allow nullifying the delay slot.
> 
> Jeff


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