This is the mail archive of the
gcc@gcc.gnu.org
mailing list for the GCC project.
Re: [x86-64 psABI]: Extend x86-64 psABI to support AVX-512
- From: Peter Bergner <bergner at vnet dot ibm dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: Richard Biener <richard dot guenther at gmail dot com>, GNU C Library <libc-alpha at sourceware dot org>, GCC Development <gcc at gcc dot gnu dot org>, Binutils <binutils at sourceware dot org>, "Girkar, Milind" <milind dot girkar at intel dot com>, "Kreitzer, David L" <david dot l dot kreitzer at intel dot com>
- Date: Wed, 24 Jul 2013 12:55:24 -0500
- Subject: Re: [x86-64 psABI]: Extend x86-64 psABI to support AVX-512
- References: <CAMe9rOrvMxSLj3LcYBs71tVdw6C0vJFKD2HxvnoHc13UamftwA at mail dot gmail dot com> <ddab98c2-bb3b-4d02-b403-e7d5690cfe00 at email dot android dot com> <CAMe9rOpxErCVtE-PDZ3Yb9mL+4E+XQ-are9Df4YBbEioj+MmZA at mail dot gmail dot com> <b9c5d467-834a-4b57-b48c-ac4bb450c9e5 at email dot android dot com> <CAMe9rOozbwqo65xaxQWYe7EAUnzy+F+vpfB-6Xp36gBgB1aONA at mail dot gmail dot com>
On Wed, 2013-07-24 at 10:42 -0700, H.J. Lu wrote:
> Are there any other Linux targets with callee saved vector registers?
Yes, on POWER. From our ABI:
On processors with the VMX feature.
v0-v1 Volatile scratch registers
v2-v13 Volatile vector parameters registers
v14-v19 Volatile scratch registers
v20-v31 Non-volatile registers
I'll note that the new VSX register state we recently added with power7
were made volatile, but then we already had these non-volatile altivec
regs to use.
Peteer